📄 shm.rpt
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** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'B':
Logic cells placed in LAB 'B'
+--------- LC17 F1
| +------- LC19 F2
| | +----- LC27 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node1
| | | +--- LC18 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node2
| | | | +- LC20 CP2
| | | | |
| | | | | Other LABs fed by signals
| | | | | that feed LAB 'B'
LC | | | | | | A B C D | Logic cells that feed LAB 'B':
LC20 -> * * - - * | - * - - | <-- CP2
Pin
43 -> - - - - - | - - - - | <-- CLK
12 -> - - - - * | - * - - | <-- CP1
LC51 -> * * - - - | - * - * | <-- SH1
LC43 -> - - - * - | - * - * | <-- P12
LC44 -> - - * * - | - * - * | <-- P11
LC50 -> - - * * - | - * - * | <-- P10
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: d:\program files\texteditor\shm.rpt
shm
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'C':
Logic cells placed in LAB 'C'
+----------------------------- LC33 P115
| +--------------------------- LC34 P114
| | +------------------------- LC35 P113
| | | +----------------------- LC36 P112
| | | | +--------------------- LC37 P111
| | | | | +------------------- LC38 P110
| | | | | | +----------------- LC40 P19
| | | | | | | +--------------- LC41 P18
| | | | | | | | +------------- LC42 P17
| | | | | | | | | +----------- LC45 P16
| | | | | | | | | | +--------- LC39 P15
| | | | | | | | | | | +------- LC48 P14
| | | | | | | | | | | | +----- LC46 P13
| | | | | | | | | | | | | +--- LC43 P12
| | | | | | | | | | | | | | +- LC44 P11
| | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | that feed LAB 'C'
LC | | | | | | | | | | | | | | | | A B C D | Logic cells that feed LAB 'C':
LC33 -> * * * * * * * * * * * * * * * | - - * * | <-- P115
LC34 -> * * * * * * * * * * * * * * * | - - * * | <-- P114
LC35 -> * * * * * * * * * * * * * * * | - - * * | <-- P113
LC36 -> * * * * * * * * * * * * * * * | - - * * | <-- P112
LC37 -> * * * * * * * * * * * * * * * | - - * * | <-- P111
LC38 -> * * * * * * * * * * * * * * * | - - * * | <-- P110
LC40 -> * * * * * * * * * * * * * * * | - - * * | <-- P19
LC41 -> * * * * * * * * * * * * * * * | - - * * | <-- P18
LC42 -> * * * * * * * * * * * * * * * | - - * * | <-- P17
Pin
43 -> - - - - - - - - - - - - - - - | - - - - | <-- CLK
LC27 -> - - - - - - - - - - - - - - * | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node1
LC18 -> - - - - - - - - - - - - - * - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node2
LC52 -> - - - - - - - - - - - - * - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node3
LC54 -> - - - - - - - - - - - * - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node4
LC59 -> - - - - - - - - - - * - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node5
LC55 -> - - - - - - - - - * - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node6
LC64 -> - - - - - - - - * - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node7
LC63 -> - - - - - - - * - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node0
LC62 -> - - - - - - * - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node1
LC61 -> - - - - - * - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node2
LC60 -> - - - - * - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node3
LC58 -> - - - * - - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node4
LC57 -> - - * - - - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node5
LC53 -> - * - - - - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node6
LC56 -> * - - - - - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node7
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: d:\program files\texteditor\shm.rpt
shm
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'D':
Logic cells placed in LAB 'D'
+------------------------------- LC52 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node3
| +----------------------------- LC54 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node4
| | +--------------------------- LC59 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node5
| | | +------------------------- LC55 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node6
| | | | +----------------------- LC64 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder0|result_node7
| | | | | +--------------------- LC63 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node0
| | | | | | +------------------- LC62 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node1
| | | | | | | +----------------- LC61 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node2
| | | | | | | | +--------------- LC60 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node3
| | | | | | | | | +------------- LC58 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node4
| | | | | | | | | | +----------- LC57 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node5
| | | | | | | | | | | +--------- LC53 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node6
| | | | | | | | | | | | +------- LC56 |LPM_ADD_SUB:1093|addcore:adder|addcore:adder1|result_node7
| | | | | | | | | | | | | +----- LC49 SH
| | | | | | | | | | | | | | +--- LC51 SH1
| | | | | | | | | | | | | | | +- LC50 P10
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'D'
LC | | | | | | | | | | | | | | | | | A B C D | Logic cells that feed LAB 'D':
LC49 -> - - - - - - - - - - - - - * - - | - - - * | <-- SH
LC51 -> - - - - - - - - - - - - - - * - | - * - * | <-- SH1
LC50 -> * * * * * * * * * * * * * - * * | - * - * | <-- P10
Pin
43 -> - - - - - - - - - - - - - - - - | - - - - | <-- CLK
LC33 -> - - - - - - - - - - - - * * * * | - - * * | <-- P115
LC34 -> - - - - - - - - - - - * * * * * | - - * * | <-- P114
LC35 -> - - - - - - - - - - * * * * * * | - - * * | <-- P113
LC36 -> - - - - - - - - - * * * * * * * | - - * * | <-- P112
LC37 -> - - - - - - - - * * * * * * * * | - - * * | <-- P111
LC38 -> - - - - - - - * * * * * * * * * | - - * * | <-- P110
LC40 -> - - - - - - * * * * * * * * * * | - - * * | <-- P19
LC41 -> - - - - - * * * * * * * * * * * | - - * * | <-- P18
LC42 -> - - - - * * * * * * * * * * * * | - - * * | <-- P17
LC45 -> - - - * * * * * * * * * * * * - | - - - * | <-- P16
LC39 -> - - * * * * * * * * * * * * * - | - - - * | <-- P15
LC48 -> - * * * * * * * * * * * * * * - | - - - * | <-- P14
LC46 -> * * * * * * * * * * * * * * * - | - - - * | <-- P13
LC43 -> * * * * * * * * * * * * * - * - | - * - * | <-- P12
LC44 -> * * * * * * * * * * * * * - * - | - * - * | <-- P11
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: d:\program files\texteditor\shm.rpt
shm
** EQUATIONS **
CLK : INPUT;
CP1 : INPUT;
-- Node name is ':6' = 'CP2'
-- Equation name is 'CP2', location is LC020, type is buried.
CP2 = TFFE( VCC, CP1, VCC, VCC, VCC);
-- Node name is 'F1'
-- Equation name is 'F1', location is LC017, type is output.
F1 = LCELL( _EQ001 $ VCC);
_EQ001 = CP2 & !SH1;
-- Node name is 'F2'
-- Equation name is 'F2', location is LC019, type is output.
F2 = LCELL( _EQ002 $ GND);
_EQ002 = CP2 & !SH1;
-- Node name is ':23' = 'P10'
-- Equation name is 'P10', location is LC050, type is buried.
P10 = DFFE( _EQ003 $ !P115, GLOBAL( CLK), VCC, VCC, VCC);
_EQ003 = !P10 & !P17 & !P18 & !P110 & !P111 & !P112 & !P114 & P115
# !P10 & !P19 & !P110 & !P111 & !P112 & !P114 & P115
# !P10 & !P113 & !P114 & P115
# P10 & !P115;
-- Node name is ':22' = 'P11'
-- Equation name is 'P11', location is LC044, type is buried.
P11 = DFFE( _EQ004 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ004 = _LC027 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC027 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC027 & !P113 & !P114 & P115
# _LC027 & !P115;
-- Node name is ':21' = 'P12'
-- Equation name is 'P12', location is LC043, type is buried.
P12 = DFFE( _EQ005 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ005 = _LC018 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC018 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC018 & !P113 & !P114 & P115
# _LC018 & !P115;
-- Node name is ':20' = 'P13'
-- Equation name is 'P13', location is LC046, type is buried.
P13 = DFFE( _EQ006 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ006 = _LC052 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC052 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC052 & !P113 & !P114 & P115
# _LC052 & !P115;
-- Node name is ':19' = 'P14'
-- Equation name is 'P14', location is LC048, type is buried.
P14 = DFFE( _EQ007 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ007 = _LC054 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC054 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC054 & !P113 & !P114 & P115
# _LC054 & !P115;
-- Node name is ':18' = 'P15'
-- Equation name is 'P15', location is LC039, type is buried.
P15 = DFFE( _EQ008 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ008 = _LC059 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC059 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC059 & !P113 & !P114 & P115
# _LC059 & !P115;
-- Node name is ':17' = 'P16'
-- Equation name is 'P16', location is LC045, type is buried.
P16 = DFFE( _EQ009 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ009 = _LC055 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC055 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC055 & !P113 & !P114 & P115
# _LC055 & !P115;
-- Node name is ':16' = 'P17'
-- Equation name is 'P17', location is LC042, type is buried.
P17 = DFFE( _EQ010 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ010 = _LC064 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC064 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC064 & !P113 & !P114 & P115
# _LC064 & !P115;
-- Node name is ':15' = 'P18'
-- Equation name is 'P18', location is LC041, type is buried.
P18 = DFFE( _EQ011 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ011 = _LC063 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC063 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC063 & !P113 & !P114 & P115
# _LC063 & !P115;
-- Node name is ':14' = 'P19'
-- Equation name is 'P19', location is LC040, type is buried.
P19 = DFFE( _EQ012 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ012 = _LC062 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
# _LC062 & !P19 & !P110 & !P111 & !P112 & P113 & !P114 & P115
# _LC062 & !P113 & !P114 & P115
# _LC062 & !P115;
-- Node name is ':13' = 'P110'
-- Equation name is 'P110', location is LC038, type is buried.
P110 = DFFE( _EQ013 $ GND, GLOBAL( CLK), VCC, VCC, VCC);
_EQ013 = _LC061 & !P17 & !P18 & P19 & !P110 & !P111 & !P112 & P113 &
!P114 & P115
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