tm.hif

基于fpga数字钟系统

Version 7.2 Build 151 09/26/2007 SJ Full Version
11
920
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
seltime
# storage
db|TM.(1).cnf
db|TM.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
seltime.vhd
959c8d3286bbb8e720bf81208495c2
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
seltime:inst2
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
deled
# storage
db|TM.(4).cnf
db|TM.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
deled.vhd
2feb9b45e1e716d3b3a8fcbf85cc9a
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
deled:inst4
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
YIMA
# storage
db|TM.(5).cnf
db|TM.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
YIMA.vhd
b6665ec66047f3fa4678de6aa55a132
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
YIMA:inst3
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
clock
# storage
db|TM.(2).cnf
db|TM.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clock.vhd
dd89f913d0912694262a540146070
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
clock:inst
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
FPQ
# storage
db|TM.(3).cnf
db|TM.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
FPQ.vhd
af5e124bfd296bed8d5fc5925d83d79
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
FPQ:inst6
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
XS
# storage
db|TM.(6).cnf
db|TM.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
XS.vhd
77a625884da8d5b6be84fe43c69e122
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
XS:inst1
}
# lmf
c:|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
TM
# storage
db|TM.(0).cnf
db|TM.(0).cnf
# case_insensitive
# source_file
TM.bdf
a6cbbad4b659a77568caedc9c5be3874
25
# internal_option {
BLOCK_DESIGN_NAMING
OFF
}
# hierarchies {
|
}
# lmf
c:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete