seltime.map.summary

基于fpga数字钟系统

Analysis & Synthesis Status : Successful - Thu Nov 27 18:15:52 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : seltime
Top-level Entity Name : seltime
Family : Cyclone II
Total logic elements : 28
    Total combinational functions : 28
    Dedicated logic registers : 3
Total registers : 3
Total pins : 33
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0