seltime.rpt

有关数字钟的

-- Node name is ':447' 
-- Equation name is '_LC1_A11', type is buried 
_LC1_A11 = LCELL( _EQ009);
  _EQ009 = !count0 &  count1 & !count2;

-- Node name is ':450' 
-- Equation name is '_LC7_A1', type is buried 
_LC7_A1  = LCELL( _EQ010);
  _EQ010 = !_LC1_A11 &  _LC6_A1
         #  _LC1_A11 &  minute3;

-- Node name is ':457' 
-- Equation name is '_LC1_A1', type is buried 
_LC1_A1  = LCELL( _EQ011);
  _EQ011 =  count0 & !count1 & !count2;

-- Node name is ':460' 
-- Equation name is '_LC8_A1', type is buried 
_LC8_A1  = LCELL( _EQ012);
  _EQ012 = !_LC1_A1 &  _LC7_A1
         #  _LC1_A1 &  second7;

-- Node name is ':467' 
-- Equation name is '_LC2_A9', type is buried 
_LC2_A9  = LCELL( _EQ013);
  _EQ013 = !count0 & !count1 & !count2;

-- Node name is ':470' 
-- Equation name is '_LC2_A1', type is buried 
_LC2_A1  = LCELL( _EQ014);
  _EQ014 = !_LC2_A9 &  _LC8_A1
         #  _LC2_A9 &  second3;

-- Node name is ':476' 
-- Equation name is '_LC2_A10', type is buried 
_LC2_A10 = LCELL( _EQ015);
  _EQ015 = !_LC6_A9 &  _LC7_A10 &  reset
         #  hour6 &  _LC6_A9;

-- Node name is ':480' 
-- Equation name is '_LC4_A10', type is buried 
_LC4_A10 = LCELL( _EQ016);
  _EQ016 = !count0 & !count1 &  count2 &  hour2;

-- Node name is ':481' 
-- Equation name is '_LC3_A10', type is buried 
_LC3_A10 = LCELL( _EQ017);
  _EQ017 =  count1 &  _LC2_A10
         #  count0 &  _LC2_A10
         # !count2 &  _LC2_A10;

-- Node name is ':482' 
-- Equation name is '_LC5_A10', type is buried 
_LC5_A10 = LCELL( _EQ018);
  _EQ018 = !_LC1_A10 &  _LC3_A10
         # !_LC1_A10 &  _LC4_A10
         #  _LC1_A10 &  minute6;

-- Node name is ':485' 
-- Equation name is '_LC6_A10', type is buried 
_LC6_A10 = LCELL( _EQ019);
  _EQ019 = !_LC1_A11 &  _LC5_A10
         #  _LC1_A11 &  minute2;

-- Node name is ':488' 
-- Equation name is '_LC8_A10', type is buried 
_LC8_A10 = LCELL( _EQ020);
  _EQ020 = !_LC1_A1 &  _LC6_A10
         #  _LC1_A1 &  second6;

-- Node name is ':491' 
-- Equation name is '_LC7_A10', type is buried 
_LC7_A10 = LCELL( _EQ021);
  _EQ021 = !_LC2_A9 &  _LC8_A10
         #  _LC2_A9 &  second2;

-- Node name is ':497' 
-- Equation name is '_LC3_A11', type is buried 
_LC3_A11 = LCELL( _EQ022);
  _EQ022 =  _LC2_A11 & !_LC6_A9 &  reset
         #  hour5 &  _LC6_A9;

-- Node name is ':501' 
-- Equation name is '_LC5_A11', type is buried 
_LC5_A11 = LCELL( _EQ023);
  _EQ023 = !count0 & !count1 &  count2 &  hour1;

-- Node name is ':502' 
-- Equation name is '_LC4_A11', type is buried 
_LC4_A11 = LCELL( _EQ024);
  _EQ024 =  count1 &  _LC3_A11
         #  count0 &  _LC3_A11
         # !count2 &  _LC3_A11;

-- Node name is ':503' 
-- Equation name is '_LC6_A11', type is buried 
_LC6_A11 = LCELL( _EQ025);
  _EQ025 = !_LC1_A10 &  _LC4_A11
         # !_LC1_A10 &  _LC5_A11
         #  _LC1_A10 &  minute5;

-- Node name is ':506' 
-- Equation name is '_LC7_A11', type is buried 
_LC7_A11 = LCELL( _EQ026);
  _EQ026 = !_LC1_A11 &  _LC6_A11
         #  _LC1_A11 &  minute1;

-- Node name is ':509' 
-- Equation name is '_LC8_A11', type is buried 
_LC8_A11 = LCELL( _EQ027);
  _EQ027 = !_LC1_A1 &  _LC7_A11
         #  _LC1_A1 &  second5;

-- Node name is ':512' 
-- Equation name is '_LC2_A11', type is buried 
_LC2_A11 = LCELL( _EQ028);
  _EQ028 = !_LC2_A9 &  _LC8_A11
         #  _LC2_A9 &  second1;

-- Node name is ':518' 
-- Equation name is '_LC8_A9', type is buried 
_LC8_A9  = LCELL( _EQ029);
  _EQ029 = !_LC6_A9 &  _LC8_A8 &  reset
         #  hour4 &  _LC6_A9;

-- Node name is ':522' 
-- Equation name is '_LC4_A9', type is buried 
_LC4_A9  = LCELL( _EQ030);
  _EQ030 = !count0 & !count1 &  count2 &  hour0;

-- Node name is ':523' 
-- Equation name is '_LC5_A9', type is buried 
_LC5_A9  = LCELL( _EQ031);
  _EQ031 =  count1 &  _LC8_A9
         #  count0 &  _LC8_A9
         # !count2 &  _LC8_A9;

-- Node name is ':524' 
-- Equation name is '_LC1_A8', type is buried 
_LC1_A8  = LCELL( _EQ032);
  _EQ032 = !_LC1_A10 &  _LC5_A9
         # !_LC1_A10 &  _LC4_A9
         #  _LC1_A10 &  minute4;

-- Node name is ':527' 
-- Equation name is '_LC2_A8', type is buried 
_LC2_A8  = LCELL( _EQ033);
  _EQ033 =  _LC1_A8 & !_LC1_A11
         #  _LC1_A11 &  minute0;

-- Node name is ':530' 
-- Equation name is '_LC3_A8', type is buried 
_LC3_A8  = LCELL( _EQ034);
  _EQ034 = !_LC1_A1 &  _LC2_A8
         #  _LC1_A1 &  second4;

-- Node name is ':533' 
-- Equation name is '_LC8_A8', type is buried 
_LC8_A8  = LCELL( _EQ035);
  _EQ035 = !_LC2_A9 &  _LC3_A8
         #  _LC2_A9 &  second0;



Project Information                               c:\vhdl\digclock\seltime.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'ACEX1K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 18,355K