prev_cmp_ncof.tan.qmsg

quartus2环境中设计的高速任意波形发生器

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] register sld_hub:sld_hub_inst\|hub_tdo_reg 315.46 MHz 3.17 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 315.46 MHz between source register \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]\" and destination register \"sld_hub:sld_hub_inst\|hub_tdo_reg\" (period= 3.17 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.364 ns + Longest register register " "Info: + Longest register to register delay is 1.364 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] 1 REG LCFF_X33_Y26_N31 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X33_Y26_N31; Fanout = 8; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.776 ns) + CELL(0.410 ns) 1.186 ns sld_hub:sld_hub_inst\|hub_tdo_reg~280 2 COMB LCCOMB_X33_Y28_N0 1 " "Info: 2: + IC(0.776 ns) + CELL(0.410 ns) = 1.186 ns; Loc. = LCCOMB_X33_Y28_N0; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg~280'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.186 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|hub_tdo_reg~280 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 1.364 ns sld_hub:sld_hub_inst\|hub_tdo_reg 3 REG LCFF_X33_Y28_N1 2 " "Info: 3: + IC(0.000 ns) + CELL(0.178 ns) = 1.364 ns; Loc. = LCFF_X33_Y28_N1; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.588 ns ( 43.11 % ) " "Info: Total cell delay = 0.588 ns ( 43.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.776 ns ( 56.89 % ) " "Info: Total interconnect delay = 0.776 ns ( 56.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.364 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.364 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] {} sld_hub:sld_hub_inst|hub_tdo_reg~280 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 0.776ns 0.000ns } { 0.000ns 0.410ns 0.178ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.008 ns - Smallest " "Info: - Smallest clock skew is -0.008 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 3.402 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 3.402 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.412 ns) + CELL(0.000 ns) 1.412 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G2 65 " "Info: 2: + IC(1.412 ns) + CELL(0.000 ns) = 1.412 ns; Loc. = CLKCTRL_G2; Fanout = 65; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.412 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.280 ns) + CELL(0.710 ns) 3.402 ns sld_hub:sld_hub_inst\|hub_tdo_reg 3 REG LCFF_X33_Y28_N1 2 " "Info: 3: + IC(1.280 ns) + CELL(0.710 ns) = 3.402 ns; Loc. = LCFF_X33_Y28_N1; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.990 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 20.87 % ) " "Info: Total cell delay = 0.710 ns ( 20.87 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.692 ns ( 79.13 % ) " "Info: Total interconnect delay = 2.692 ns ( 79.13 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.402 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.402 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.412ns 1.280ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 3.410 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 3.410 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.412 ns) + CELL(0.000 ns) 1.412 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G2 65 " "Info: 2: + IC(1.412 ns) + CELL(0.000 ns) = 1.412 ns; Loc. = CLKCTRL_G2; Fanout = 65; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.412 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.288 ns) + CELL(0.710 ns) 3.410 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\] 3 REG LCFF_X33_Y26_N31 8 " "Info: 3: + IC(1.288 ns) + CELL(0.710 ns) = 3.410 ns; Loc. = LCFF_X33_Y26_N31; Fanout = 8; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[3\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.998 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 20.82 % ) " "Info: Total cell delay = 0.710 ns ( 20.82 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.700 ns ( 79.18 % ) " "Info: Total interconnect delay = 2.700 ns ( 79.18 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.410 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.410 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] {} } { 0.000ns 1.412ns 1.288ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.402 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.402 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.412ns 1.280ns } { 0.000ns 0.000ns 0.710ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.410 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.410 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] {} } { 0.000ns 1.412ns 1.288ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.109 ns + " "Info: + Micro clock to output delay of source is 0.109 ns" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.104 ns + " "Info: + Micro setup delay of destination is 0.104 ns" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.364 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.364 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] {} sld_hub:sld_hub_inst|hub_tdo_reg~280 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 0.776ns 0.000ns } { 0.000ns 0.410ns 0.178ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.402 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.402 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.412ns 1.280ns } { 0.000ns 0.000ns 0.710ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.410 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.410 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] {} } { 0.000ns 1.412ns 1.288ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~CLKDRUSER register pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\] register pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 568.83 MHz 1.758 ns Internal " "Info: Clock \"altera_internal_jtag~CLKDRUSER\" has Internal fmax of 568.83 MHz between source register \"pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\]\" and destination register \"pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]\" (period= 1.758 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.545 ns + Longest register register " "Info: + Longest register to register delay is 1.545 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\] 1 REG LCFF_X32_Y25_N11 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X32_Y25_N11; Fanout = 9; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.313 ns) + CELL(0.355 ns) 0.668 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~77 2 COMB LCCOMB_X32_Y25_N0 2 " "Info: 2: + IC(0.313 ns) + CELL(0.355 ns) = 0.668 ns; Loc. = LCCOMB_X32_Y25_N0; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~77'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.668 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.709 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~81 3 COMB LCCOMB_X32_Y25_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.041 ns) = 0.709 ns; Loc. = LCCOMB_X32_Y25_N2; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~81'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.750 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~85 4 COMB LCCOMB_X32_Y25_N4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.041 ns) = 0.750 ns; Loc. = LCCOMB_X32_Y25_N4; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~85'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.791 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~89 5 COMB LCCOMB_X32_Y25_N6 1 " "Info: 5: + IC(0.000 ns) + CELL(0.041 ns) = 0.791 ns; Loc. = LCCOMB_X32_Y25_N6; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~89'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.144 ns) 0.935 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~92 6 COMB LCCOMB_X32_Y25_N8 1 " "Info: 6: + IC(0.000 ns) + CELL(0.144 ns) = 0.935 ns; Loc. = LCCOMB_X32_Y25_N8; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~92'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.144 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.372 ns) + CELL(0.060 ns) 1.367 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180~289 7 COMB LCCOMB_X32_Y25_N12 1 " "Info: 7: + IC(0.372 ns) + CELL(0.060 ns) = 1.367 ns; Loc. = LCCOMB_X32_Y25_N12; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180~289'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.432 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 971 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 1.545 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 8 REG LCFF_X32_Y25_N13 8 " "Info: 8: + IC(0.000 ns) + CELL(0.178 ns) = 1.545 ns; Loc. = LCFF_X32_Y25_N13; Fanout = 8; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.860 ns ( 55.66 % ) " "Info: Total cell delay = 0.860 ns ( 55.66 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.685 ns ( 44.34 % ) " "Info: Total interconnect delay = 0.685 ns ( 44.34 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.545 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.545 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] {} } { 0.000ns 0.313ns 0.000ns 0.000ns 0.000ns 0.000ns 0.372ns 0.000ns } { 0.000ns 0.355ns 0.041ns 0.041ns 0.041ns 0.144ns 0.060ns 0.178ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~CLKDRUSER destination 3.414 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~CLKDRUSER\" to destination register is 3.414 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~CLKDRUSER 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~CLKDRUSER'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~CLKDRUSER } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.430 ns) + CELL(0.000 ns) 1.430 ns altera_internal_jtag~CLKDRUSERclkctrl 2 COMB CLKCTRL_G0 23 " "Info: 2: + IC(1.430 ns) + CELL(0.000 ns) = 1.430 ns; Loc. = CLKCTRL_G0; Fanout = 23; COMB Node = 'altera_internal_jtag~CLKDRUSERclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.430 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.274 ns) + CELL(0.710 ns) 3.414 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 3 REG LCFF_X32_Y25_N13 8 " "Info: 3: + IC(1.274 ns) + CELL(0.710 ns) = 3.414 ns; Loc. = LCFF_X32_Y25_N13; Fanout = 8; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.984 ns" { altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 20.80 % ) " "Info: Total cell delay = 0.710 ns ( 20.80 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.704 ns ( 79.20 % ) " "Info: Total interconnect delay = 2.704 ns ( 79.20 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.414 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.414 ns" { altera_internal_jtag~CLKDRUSER {} altera_internal_jtag~CLKDRUSERclkctrl {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] {} } { 0.000ns 1.430ns 1.274ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~CLKDRUSER source 3.414 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~CLKDRUSER\" to source register is 3.414 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~CLKDRUSER 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~CLKDRUSER'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~CLKDRUSER } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.430 ns) + CELL(0.000 ns) 1.430 ns altera_internal_jtag~CLKDRUSERclkctrl 2 COMB CLKCTRL_G0 23 " "Info: 2: + IC(1.430 ns) + CELL(0.000 ns) = 1.430 ns; Loc. = CLKCTRL_G0; Fanout = 23; COMB Node = 'altera_internal_jtag~CLKDRUSERclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.430 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.274 ns) + CELL(0.710 ns) 3.414 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|A