ncof.tan.qmsg

quartus2环境中设计的高速任意波形发生器

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 register sld_hub:sld_hub_inst\|hub_tdo_reg 328.95 MHz 3.04 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 328.95 MHz between source register \"sld_hub:sld_hub_inst\|jtag_debug_mode_usr1\" and destination register \"sld_hub:sld_hub_inst\|hub_tdo_reg\" (period= 3.04 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.313 ns + Longest register register " "Info: + Longest register to register delay is 1.313 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 1 REG LCFF_X23_Y19_N7 20 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X23_Y19_N7; Fanout = 20; REG Node = 'sld_hub:sld_hub_inst\|jtag_debug_mode_usr1'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 393 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.700 ns) + CELL(0.435 ns) 1.135 ns sld_hub:sld_hub_inst\|hub_tdo_reg~280 2 COMB LCCOMB_X26_Y19_N24 1 " "Info: 2: + IC(0.700 ns) + CELL(0.435 ns) = 1.135 ns; Loc. = LCCOMB_X26_Y19_N24; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg~280'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.135 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 sld_hub:sld_hub_inst|hub_tdo_reg~280 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 1.313 ns sld_hub:sld_hub_inst\|hub_tdo_reg 3 REG LCFF_X26_Y19_N25 2 " "Info: 3: + IC(0.000 ns) + CELL(0.178 ns) = 1.313 ns; Loc. = LCFF_X26_Y19_N25; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.613 ns ( 46.69 % ) " "Info: Total cell delay = 0.613 ns ( 46.69 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.700 ns ( 53.31 % ) " "Info: Total interconnect delay = 0.700 ns ( 53.31 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.313 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.313 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 {} sld_hub:sld_hub_inst|hub_tdo_reg~280 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 0.700ns 0.000ns } { 0.000ns 0.435ns 0.178ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.006 ns - Smallest " "Info: - Smallest clock skew is 0.006 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 3.182 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 3.182 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.198 ns) + CELL(0.000 ns) 1.198 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G0 65 " "Info: 2: + IC(1.198 ns) + CELL(0.000 ns) = 1.198 ns; Loc. = CLKCTRL_G0; Fanout = 65; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.198 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.274 ns) + CELL(0.710 ns) 3.182 ns sld_hub:sld_hub_inst\|hub_tdo_reg 3 REG LCFF_X26_Y19_N25 2 " "Info: 3: + IC(1.274 ns) + CELL(0.710 ns) = 3.182 ns; Loc. = LCFF_X26_Y19_N25; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo_reg'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.984 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 22.31 % ) " "Info: Total cell delay = 0.710 ns ( 22.31 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.472 ns ( 77.69 % ) " "Info: Total interconnect delay = 2.472 ns ( 77.69 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.182 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.182 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.198ns 1.274ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 3.176 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 3.176 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.198 ns) + CELL(0.000 ns) 1.198 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G0 65 " "Info: 2: + IC(1.198 ns) + CELL(0.000 ns) = 1.198 ns; Loc. = CLKCTRL_G0; Fanout = 65; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.198 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.268 ns) + CELL(0.710 ns) 3.176 ns sld_hub:sld_hub_inst\|jtag_debug_mode_usr1 3 REG LCFF_X23_Y19_N7 20 " "Info: 3: + IC(1.268 ns) + CELL(0.710 ns) = 3.176 ns; Loc. = LCFF_X23_Y19_N7; Fanout = 20; REG Node = 'sld_hub:sld_hub_inst\|jtag_debug_mode_usr1'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.978 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 393 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 22.36 % ) " "Info: Total cell delay = 0.710 ns ( 22.36 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.466 ns ( 77.64 % ) " "Info: Total interconnect delay = 2.466 ns ( 77.64 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.176 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.176 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|jtag_debug_mode_usr1 {} } { 0.000ns 1.198ns 1.268ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.182 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.182 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.198ns 1.274ns } { 0.000ns 0.000ns 0.710ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.176 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.176 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|jtag_debug_mode_usr1 {} } { 0.000ns 1.198ns 1.268ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.109 ns + " "Info: + Micro clock to output delay of source is 0.109 ns" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 393 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.104 ns + " "Info: + Micro setup delay of destination is 0.104 ns" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" {  } { { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 393 -1 0 } } { "../../altera/72/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/sld_hub.vhd" 385 -1 0 } }  } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.313 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 sld_hub:sld_hub_inst|hub_tdo_reg~280 sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.313 ns" { sld_hub:sld_hub_inst|jtag_debug_mode_usr1 {} sld_hub:sld_hub_inst|hub_tdo_reg~280 {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 0.700ns 0.000ns } { 0.000ns 0.435ns 0.178ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.182 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo_reg } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.182 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|hub_tdo_reg {} } { 0.000ns 1.198ns 1.274ns } { 0.000ns 0.000ns 0.710ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.176 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|jtag_debug_mode_usr1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.176 ns" { altera_internal_jtag~TCKUTAP {} altera_internal_jtag~TCKUTAPclkctrl {} sld_hub:sld_hub_inst|jtag_debug_mode_usr1 {} } { 0.000ns 1.198ns 1.268ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~CLKDRUSER register pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\] register pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 574.05 MHz 1.742 ns Internal " "Info: Clock \"altera_internal_jtag~CLKDRUSER\" has Internal fmax of 574.05 MHz between source register \"pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\]\" and destination register \"pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]\" (period= 1.742 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.529 ns + Longest register register " "Info: + Longest register to register delay is 1.529 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\] 1 REG LCFF_X29_Y34_N27 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y34_N27; Fanout = 9; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.355 ns) 0.655 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~77 2 COMB LCCOMB_X29_Y34_N16 2 " "Info: 2: + IC(0.300 ns) + CELL(0.355 ns) = 0.655 ns; Loc. = LCCOMB_X29_Y34_N16; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~77'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.655 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.696 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~81 3 COMB LCCOMB_X29_Y34_N18 2 " "Info: 3: + IC(0.000 ns) + CELL(0.041 ns) = 0.696 ns; Loc. = LCCOMB_X29_Y34_N18; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~81'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.737 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~85 4 COMB LCCOMB_X29_Y34_N20 2 " "Info: 4: + IC(0.000 ns) + CELL(0.041 ns) = 0.737 ns; Loc. = LCCOMB_X29_Y34_N20; Fanout = 2; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~85'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.041 ns) 0.778 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~89 5 COMB LCCOMB_X29_Y34_N22 1 " "Info: 5: + IC(0.000 ns) + CELL(0.041 ns) = 0.778 ns; Loc. = LCCOMB_X29_Y34_N22; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~89'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.041 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.144 ns) 0.922 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~92 6 COMB LCCOMB_X29_Y34_N24 1 " "Info: 6: + IC(0.000 ns) + CELL(0.144 ns) = 0.922 ns; Loc. = LCCOMB_X29_Y34_N24; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|Add0~92'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.144 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 991 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.369 ns) + CELL(0.060 ns) 1.351 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180~289 7 COMB LCCOMB_X29_Y34_N12 1 " "Info: 7: + IC(0.369 ns) + CELL(0.060 ns) = 1.351 ns; Loc. = LCCOMB_X29_Y34_N12; Fanout = 1; COMB Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180~289'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.429 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 971 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 1.529 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 8 REG LCFF_X29_Y34_N13 8 " "Info: 8: + IC(0.000 ns) + CELL(0.178 ns) = 1.529 ns; Loc. = LCFF_X29_Y34_N13; Fanout = 8; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.860 ns ( 56.25 % ) " "Info: Total cell delay = 0.860 ns ( 56.25 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.669 ns ( 43.75 % ) " "Info: Total interconnect delay = 0.669 ns ( 43.75 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.529 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.529 ns" { pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~77 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~81 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~85 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~89 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|Add0~92 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180~289 {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] {} } { 0.000ns 0.300ns 0.000ns 0.000ns 0.000ns 0.000ns 0.369ns 0.000ns } { 0.000ns 0.355ns 0.041ns 0.041ns 0.041ns 0.144ns 0.060ns 0.178ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~CLKDRUSER destination 3.385 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~CLKDRUSER\" to destination register is 3.385 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~CLKDRUSER 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~CLKDRUSER'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~CLKDRUSER } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.383 ns) + CELL(0.000 ns) 1.383 ns altera_internal_jtag~CLKDRUSERclkctrl 2 COMB CLKCTRL_G2 23 " "Info: 2: + IC(1.383 ns) + CELL(0.000 ns) = 1.383 ns; Loc. = CLKCTRL_G2; Fanout = 23; COMB Node = 'altera_internal_jtag~CLKDRUSERclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.383 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.292 ns) + CELL(0.710 ns) 3.385 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\] 3 REG LCFF_X29_Y34_N13 8 " "Info: 3: + IC(1.292 ns) + CELL(0.710 ns) = 3.385 ns; Loc. = LCFF_X29_Y34_N13; Fanout = 8; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[4\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.002 ns" { altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 20.97 % ) " "Info: Total cell delay = 0.710 ns ( 20.97 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.675 ns ( 79.03 % ) " "Info: Total interconnect delay = 2.675 ns ( 79.03 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.385 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.385 ns" { altera_internal_jtag~CLKDRUSER {} altera_internal_jtag~CLKDRUSERclkctrl {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] {} } { 0.000ns 1.383ns 1.292ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~CLKDRUSER source 3.385 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~CLKDRUSER\" to source register is 3.385 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~CLKDRUSER 1 CLK JTAG_X0_Y26_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X0_Y26_N1; Fanout = 1; CLK Node = 'altera_internal_jtag~CLKDRUSER'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~CLKDRUSER } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.383 ns) + CELL(0.000 ns) 1.383 ns altera_internal_jtag~CLKDRUSERclkctrl 2 COMB CLKCTRL_G2 23 " "Info: 2: + IC(1.383 ns) + CELL(0.000 ns) = 1.383 ns; Loc. = CLKCTRL_G2; Fanout = 23; COMB Node = 'altera_internal_jtag~CLKDRUSERclkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.383 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.292 ns) + CELL(0.710 ns) 3.385 ns pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\] 3 REG LCFF_X29_Y34_N27 9 " "Info: 3: + IC(1.292 ns) + CELL(0.710 ns) = 3.385 ns; Loc. = LCFF_X29_Y34_N27; Fanout = 9; REG Node = 'pzdyqx:nabboc\|pzdyqx_impl:pzdyqx_impl_inst\|VELJ8121:JDCF0099\|AJQN5180\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.002 ns" { altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] } "NODE_NAME" } } { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.710 ns ( 20.97 % ) " "Info: Total cell delay = 0.710 ns ( 20.97 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.675 ns ( 79.03 % ) " "Info: Total interconnect delay = 2.675 ns ( 79.03 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.385 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.385 ns" { altera_internal_jtag~CLKDRUSER {} altera_internal_jtag~CLKDRUSERclkctrl {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] {} } { 0.000ns 1.383ns 1.292ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.385 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.385 ns" { altera_internal_jtag~CLKDRUSER {} altera_internal_jtag~CLKDRUSERclkctrl {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[4] {} } { 0.000ns 1.383ns 1.292ns } { 0.000ns 0.000ns 0.710ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.385 ns" { altera_internal_jtag~CLKDRUSER altera_internal_jtag~CLKDRUSERclkctrl pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.385 ns" { altera_internal_jtag~CLKDRUSER {} altera_internal_jtag~CLKDRUSERclkctrl {} pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|AJQN5180[0] {} } { 0.000ns 1.383ns 1.292ns } { 0.000ns 0.000ns 0.710ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.109 ns + " "Info: + Micro clock to output delay of source is 0.109 ns" {  } { { "../../altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" "" { Text "D:/altera/72/quartus/libraries/megafunctions/pzdyqx.vhd" 985 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!"