ncof.map.rpt

quartus2环境中设计的高速任意波形发生器

; Ignore Verilog initial constructs                                           ; Off                ; Off                ;
; Add Pass-Through Logic to Inferred RAMs                                     ; On                 ; On                 ;
; Parallel Synthesis                                                          ; Off                ; Off                ;
; DSP Block Balancing                                                         ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                          ; On                 ; On                 ;
; Power-Up Don't Care                                                         ; On                 ; On                 ;
; Remove Redundant Logic Cells                                                ; Off                ; Off                ;
; Remove Duplicate Registers                                                  ; On                 ; On                 ;
; Ignore CARRY Buffers                                                        ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                      ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                       ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                   ; Off                ; Off                ;
; Ignore LCELL Buffers                                                        ; Off                ; Off                ;
; Ignore SOFT Buffers                                                         ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                              ; Off                ; Off                ;
; Optimization Technique -- Stratix II/III/HardCopy II/Stratix II GX/Arria GX ; Balanced           ; Balanced           ;
; Carry Chain Length -- Stratix II/Stratix III                                ; 70                 ; 70                 ;
; Auto Carry Chains                                                           ; On                 ; On                 ;
; Auto Open-Drain Pins                                                        ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                                       ; Off                ; Off                ;
; Perform gate-level register retiming                                        ; Off                ; Off                ;
; Allow register retiming to trade off Tsu/Tco with Fmax                      ; On                 ; On                 ;
; Auto ROM Replacement                                                        ; On                 ; On                 ;
; Auto RAM Replacement                                                        ; On                 ; On                 ;
; Auto DSP Block Replacement                                                  ; On                 ; On                 ;
; Auto Shift Register Replacement                                             ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                               ; On                 ; On                 ;
; Allow Synchronous Control Signals                                           ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                      ; Off                ; Off                ;
; Auto RAM Block Balancing                                                    ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                           ; Off                ; Off                ;
; Auto Resource Sharing                                                       ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                          ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                          ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                               ; Off                ; Off                ;
; Ignore translate_off and synthesis_off directives                           ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report                          ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                          ; Off                ; Off                ;
; Retiming Meta-Stability Register Sequence Length                            ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                                ; Normal compilation ; Normal compilation ;
; HDL message level                                                           ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                             ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                    ; 100                ; 100                ;
; Clock MUX Protection                                                        ; On                 ; On                 ;
; Block Design Naming                                                         ; Auto               ; Auto               ;
+-----------------------------------------------------------------------------+--------------------+--------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                         ;
+----------------------------------+-----------------+------------------------------------+----------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type                          ; File Name with Absolute Path                                         ;
+----------------------------------+-----------------+------------------------------------+----------------------------------------------------------------------+
; ncofsymbol_st.v                  ; yes             ; User Verilog HDL File              ; D:/my_eda/ncof/ncofsymbol_st.v                                       ;
; ncofsymbol.vhd                   ; yes             ; User VHDL File                     ; D:/my_eda/ncof/ncofsymbol.vhd                                        ;
; ncof.bdf                         ; yes             ; User Block Diagram/Schematic File  ; D:/my_eda/ncof/ncof.bdf                                              ;
; asj_xnqg.v                       ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_xnqg.v                                   ;
; segment_arr_tdl.v                ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/segment_arr_tdl.v                            ;
; asj_altqmcpipe.v                 ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_altqmcpipe.v                             ;
; lpm_add_sub.tdf                  ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf         ;
; addcore.inc                      ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/addcore.inc             ;
; look_add.inc                     ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/look_add.inc            ;
; bypassff.inc                     ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/bypassff.inc            ;
; altshift.inc                     ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altshift.inc            ;
; alt_stratix_add_sub.inc          ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/alt_stratix_add_sub.inc ;
; alt_mercury_add_sub.inc          ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/alt_mercury_add_sub.inc ;
; aglobal72.inc                    ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/aglobal72.inc           ;
; db/add_sub_rbh.tdf               ; yes             ; Auto-Generated Megafunction        ; D:/my_eda/ncof/db/add_sub_rbh.tdf                                    ;
; asj_dxx_g.v                      ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_dxx_g.v                                  ;
; asj_dxx.v                        ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_dxx.v                                    ;
; db/add_sub_m4h.tdf               ; yes             ; Auto-Generated Megafunction        ; D:/my_eda/ncof/db/add_sub_m4h.tdf                                    ;
; asj_nco_apr_dxx.v                ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_nco_apr_dxx.v                            ;
; asj_nco_pxx.v                    ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_nco_pxx.v                                ;
; db/add_sub_q4h.tdf               ; yes             ; Auto-Generated Megafunction        ; D:/my_eda/ncof/db/add_sub_q4h.tdf                                    ;
; asj_gar.v                        ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_gar.v                                    ;
; sid_2c_1p.v                      ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/sid_2c_1p.v                                  ;
; asj_nco_as_m_cen.v               ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/altera/72/ip/nco/lib/asj_nco_as_m_cen.v                           ;
; altsyncram.tdf                   ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf          ;
; stratix_ram_block.inc            ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/stratix_ram_block.inc   ;
; lpm_mux.inc                      ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_mux.inc             ;
; lpm_decode.inc                   ; yes             ; Megafunction                       ; d:/altera/72/quartus/libraries/megafunctions/lpm_decode.inc          ;