main.map.qmsg

是一些很好的FPGA设计实例

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "datecontrol date_main:inst4\|datecontrol:inst1 " "Info: Elaborating entity \"datecontrol\" for hierarchy \"date_main:inst4\|datecontrol:inst1\"" {  } { { "date_main.bdf" "inst1" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/date_main.bdf" { { 96 424 648 352 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "autodate date_main:inst4\|autodate:inst " "Info: Elaborating entity \"autodate\" for hierarchy \"date_main:inst4\|autodate:inst\"" {  } { { "date_main.bdf" "inst" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/date_main.bdf" { { 64 176 312 192 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "setdate date_main:inst4\|setdate:inst2 " "Info: Elaborating entity \"setdate\" for hierarchy \"date_main:inst4\|setdate:inst2\"" {  } { { "date_main.bdf" "inst2" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/date_main.bdf" { { 208 160 320 336 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "time_disp_select time_disp_select:inst6 " "Info: Elaborating entity \"time_disp_select\" for hierarchy \"time_disp_select:inst6\"" {  } { { "main.bdf" "inst6" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/main.bdf" { { 296 960 1240 424 "inst6" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "clk time_disp_select.v(45) " "Warning (10240): Verilog HDL Always Construct warning at time_disp_select.v(45): inferring latch(es) for variable \"clk\", which holds its previous value in one or more paths through the always construct" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 45 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "clk time_disp_select.v(35) " "Info (10041): Verilog HDL or VHDL info at time_disp_select.v(35): inferred latch for \"clk\"" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 35 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "disp_drive time_disp_select.v(45) " "Warning (10240): Verilog HDL Always Construct warning at time_disp_select.v(45): inferring latch(es) for variable \"disp_drive\", which holds its previous value in one or more paths through the always construct" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 45 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "disp_drive\[2\] time_disp_select.v(35) " "Info (10041): Verilog HDL or VHDL info at time_disp_select.v(35): inferred latch for \"disp_drive\[2\]\"" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 35 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "disp_drive\[1\] time_disp_select.v(35) " "Info (10041): Verilog HDL or VHDL info at time_disp_select.v(35): inferred latch for \"disp_drive\[1\]\"" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 35 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "disp_drive\[0\] time_disp_select.v(35) " "Info (10041): Verilog HDL or VHDL info at time_disp_select.v(35): inferred latch for \"disp_drive\[0\]\"" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 35 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "date_main:inst4\|datecontrol:inst1\|disp_select\[0\] date_main:inst4\|datecontrol:inst1\|disp_select\[1\] " "Info: Duplicate register \"date_main:inst4\|datecontrol:inst1\|disp_select\[0\]\" merged to single register \"date_main:inst4\|datecontrol:inst1\|disp_select\[1\]\"" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 56 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "date_main:inst4\|datecontrol:inst1\|disp_select\[1\] data_in GND " "Warning: Reduced register \"date_main:inst4\|datecontrol:inst1\|disp_select\[1\]\" with stuck data_in port to stuck value GND" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 56 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "date_main:inst4\|autodate:inst\|month1\[1\] data_in GND " "Warning: Reduced register \"date_main:inst4\|autodate:inst\|month1\[1\]\" with stuck data_in port to stuck value GND" {  } { { "autodate.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/autodate.v" 108 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "date_main:inst4\|autodate:inst\|month1\[2\] data_in GND " "Warning: Reduced register \"date_main:inst4\|autodate:inst\|month1\[2\]\" with stuck data_in port to stuck value GND" {  } { { "autodate.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/autodate.v" 108 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "date_main:inst4\|autodate:inst\|month1\[3\] data_in GND " "Warning: Reduced register \"date_main:inst4\|autodate:inst\|month1\[3\]\" with stuck data_in port to stuck value GND" {  } { { "autodate.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/autodate.v" 108 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "date_main:inst4\|datecontrol:inst1\|auto_disp_drive\[1\] High " "Info: Power-up level of register \"date_main:inst4\|datecontrol:inst1\|auto_disp_drive\[1\]\" is not specified -- using power-up level of High to minimize register" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 56 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "date_main:inst4\|datecontrol:inst1\|auto_disp_drive\[1\] data_in VCC " "Warning: Reduced register \"date_main:inst4\|datecontrol:inst1\|auto_disp_drive\[1\]\" with stuck data_in port to stuck value VCC" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 56 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|Data\[0\] " "Warning: Latch disp_data_mux:inst8\|Data\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|Data\[1\] " "Warning: Latch disp_data_mux:inst8\|Data\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|Data\[2\] " "Warning: Latch disp_data_mux:inst8\|Data\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|Data\[3\] " "Warning: Latch disp_data_mux:inst8\|Data\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[5\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[5\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[4\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[4\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[3\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[2\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[1\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "disp_data_mux:inst8\|disp_select\[0\] " "Warning: Latch disp_data_mux:inst8\|disp_select\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA disp_data_mux:inst8\|always0~1 " "Warning: Ports D and ENA on the latch are fed by the same signal disp_data_mux:inst8\|always0~1" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 57 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "time_disp_select:inst6\|disp_drive\[2\] " "Warning: Latch time_disp_select:inst6\|disp_drive\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA maincontrol:inst3\|Timepiece_EN " "Warning: Ports D and ENA on the latch are fed by the same signal maincontrol:inst3\|Timepiece_EN" {  } { { "maincontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/maincontrol.v" 10 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 35 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}