main.tan.qmsg

是一些很好的FPGA设计实例

{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[3\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[3\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[4\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[4\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[5\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[5\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[6\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[6\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[0\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[0\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[1\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[1\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[2\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[2\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[11\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[11\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[12\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[12\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[13\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[13\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[14\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[14\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[7\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[7\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[8\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[8\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[9\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[9\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "pulse_sum:inst4\|pulse_1\[10\] " "Warning: Node \"pulse_sum:inst4\|pulse_1\[10\]\" is a latch" {  } { { "pulse_sum.v" "" { Text "D:/整理资料/fpga/步进电机位置控制系统/第7章/main/pulse_sum.v" 22 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0}