main.map.rpt

是一些很好的FPGA设计实例

Info: Elaborating entity "fdiv" for hierarchy "fdiv:inst"
Info: Elaborating entity "pulse_16" for hierarchy "pulse_16:inst2"
Info: Elaborating entity "counter_16_bits" for hierarchy "counter_16_bits:inst1"
Info: Elaborating entity "second_pulse_latch" for hierarchy "second_pulse_latch:inst3"
Warning (10101): Verilog HDL unsupported feature warning at second_pulse_latch.v(19): Initial Construct is not supported and will be ignored
Info: Inferred 3 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=24) from the following logic: "sum_control:inst5|step_counter[0]~956"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=23) from the following logic: "fdiv:inst|CNT[0]~69"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=16) from the following logic: "counter_16_bits:inst1|counter_out[0]~16"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_counter:step_counter_rtl_0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf
    Info: Found entity 1: alt_counter_f10ke
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "sum_control:inst5|lpm_counter:step_counter_rtl_0"
Info: Instantiated megafunction "sum_control:inst5|lpm_counter:step_counter_rtl_0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "UP"
    Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Elaborated megafunction instantiation "fdiv:inst|lpm_counter:CNT_rtl_1"
Info: Elaborated megafunction instantiation "fdiv:inst|lpm_counter:CNT_rtl_1|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "fdiv:inst|lpm_counter:CNT_rtl_1"
Info: Instantiated megafunction "fdiv:inst|lpm_counter:CNT_rtl_1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "23"
    Info: Parameter "LPM_DIRECTION" = "UP"
    Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Elaborated megafunction instantiation "counter_16_bits:inst1|lpm_counter:counter_out_rtl_2"
Info: Elaborated megafunction instantiation "counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "counter_16_bits:inst1|lpm_counter:counter_out_rtl_2"
Info: Instantiated megafunction "counter_16_bits:inst1|lpm_counter:counter_out_rtl_2" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "UP"
    Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Instantiated megafunction "sum_control:inst5|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Instantiated megafunction "sum_control:inst5|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Instantiated megafunction "sum_control:inst5|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Instantiated megafunction "sum_control:inst5|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "sum_control:inst5|lpm_add_sub:Add0"
Info: Instantiated megafunction "sum_control:inst5|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "24"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1|addcore:adder", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "17"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "17"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "17"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add1"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add1" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "17"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "second_pulse_latch:inst3|lpm_add_sub:Add0"
Info: Instantiated megafunction "second_pulse_latch:inst3|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Warning: Design contains 17 input pin(s) that do not drive logic
    Warning: No output dependent on input pin "Initial_Speed[15]"
    Warning: No output dependent on input pin "Initial_Speed[14]"
    Warning: No output dependent on input pin "Initial_Speed[13]"
    Warning: No output dependent on input pin "Initial_Speed[12]"
    Warning: No output dependent on input pin "Initial_Speed[11]"
    Warning: No output dependent on input pin "Initial_Speed[10]"
    Warning: No output dependent on input pin "Initial_Speed[9]"
    Warning: No output dependent on input pin "Initial_Speed[8]"
    Warning: No output dependent on input pin "Initial_Speed[7]"
    Warning: No output dependent on input pin "Initial_Speed[6]"
    Warning: No output dependent on input pin "Initial_Speed[5]"
    Warning: No output dependent on input pin "Initial_Speed[4]"
    Warning: No output dependent on input pin "Initial_Speed[3]"
    Warning: No output dependent on input pin "Initial_Speed[2]"
    Warning: No output dependent on input pin "Initial_Speed[1]"
    Warning: No output dependent on input pin "Initial_Speed[0]"
    Warning: No output dependent on input pin "Acceleration[15]"
Info: Implemented 271 device resources after synthesis - the final resource count might be different
    Info: Implemented 59 input pins
    Info: Implemented 1 output pins
    Info: Implemented 211 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 22 warnings
    Info: Processing ended: Mon May 26 19:42:48 2008
    Info: Elapsed time: 00:00:09