main.tan.summary

是一些很好的FPGA设计实例

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.800 ns
From           : Step_Sum[0]
To             : sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
From Clock     : --
To Clock       : Reset
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 15.300 ns
From           : sum_control:inst5|out_control
To             : Pulse_Wave
From Clock     : Reset
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 7.000 ns
From           : Reset
To             : Pulse_Wave
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 5.900 ns
From           : Reset
To             : sum_control:inst5|out_control
From Clock     : --
To Clock       : Reset
Failed Paths   : 0

Type           : Clock Setup: 'Reset'
Slack          : N/A
Required Time  : None
Actual Time    : 93.46 MHz ( period = 10.700 ns )
From           : sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
To             : sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
From Clock     : Reset
To Clock       : Reset
Failed Paths   : 0

Type           : Clock Setup: 'Clock_8MHz'
Slack          : N/A
Required Time  : None
Actual Time    : 192.31 MHz ( period = 5.200 ns )
From           : second_pulse_latch:inst3|second_pulse_out[0]
To             : second_pulse_latch:inst3|second_pulse_out[14]
From Clock     : Clock_8MHz
To Clock       : Clock_8MHz
Failed Paths   : 0

Type           : Clock Hold: 'Reset'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[15]
To             : sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[15]
From Clock     : Reset
To Clock       : Reset
Failed Paths   : 325

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 325

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