main.tan.rpt

是一些很好的FPGA设计实例

+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                  ; To                                                                                    ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[7]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[6]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[5]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[4]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[2]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[1]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 93.46 MHz ( period = 10.700 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0]  ; Reset      ; Reset    ; None                        ; None                      ; 6.300 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[15] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[14] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[13] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[12] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[11] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[10] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[9]  ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[8]  ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[21] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[20] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[19] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[17] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[16] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 94.34 MHz ( period = 10.600 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[22] ; Reset      ; Reset    ; None                        ; None                      ; 6.200 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[7]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[7]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[6]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[6]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[5]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[5]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[4]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[4]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[3]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[2]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[2]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[1]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[1]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 95.24 MHz ( period = 10.500 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[0]  ; Reset      ; Reset    ; None                        ; None                      ; 6.100 ns                ;
; N/A                                     ; 96.15 MHz ( period = 10.400 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[15] ; Reset      ; Reset    ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 96.15 MHz ( period = 10.400 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[15] ; Reset      ; Reset    ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 96.15 MHz ( period = 10.400 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[14] ; Reset      ; Reset    ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 96.15 MHz ( period = 10.400 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[23] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[14] ; Reset      ; Reset    ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 96.15 MHz ( period = 10.400 ns )                    ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; sum_control:inst5|lpm_counter:step_counter_rtl_0|alt_counter_f10ke:wysi_counter|q[13] ; Reset      ; Reset    ; None                        ; None                      ; 6.000 ns                ;