full_multi.tan.summary

是一些很好的FPGA设计实例

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 13.900 ns
From           : a[0]
To             : smdisplay:inst2|74175:inst|16
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 14.200 ns
From           : smdisplay:inst2|74175:inst|16
To             : OB
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 12.300 ns
From           : CLK
To             : OG
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -1.700 ns
From           : b[3]
To             : smdisplay:inst2|74175:inst7|16
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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