📄 smdisplay.tan.qmsg
字号:
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" { } { { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 1408 -152 16 1424 "clk" "" } { 344 16 80 360 "clk" "" } { 520 16 80 536 "clk" "" } { 696 16 80 712 "clk" "" } { 872 16 80 888 "clk" "" } { 1048 16 80 1064 "clk" "" } { 1224 16 80 1240 "clk" "" } { 1400 16 80 1416 "clk" "" } { 168 56 80 184 "clk" "" } } } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "clk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "clk " "Info: No valid register-to-register data paths exist for clock \"clk\"" { } { } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITDB_TSU_RESULT" "74175:inst\|13 D\[3\] clk 5.500 ns register " "Info: tsu for register \"74175:inst\|13\" (data pin = \"D\[3\]\", clock pin = \"clk\") is 5.500 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.700 ns + Longest pin register " "Info: + Longest pin to register delay is 6.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns D\[3\] 1 PIN PIN_56 1 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_56; Fanout = 1; PIN Node = 'D\[3\]'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { D[3] } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 0 -104 64 16 "D\[31..0\]" "" } { 40 48 80 56 "D\[0\]" "" } { 56 48 80 72 "D\[1\]" "" } { 72 48 80 88 "D\[2\]" "" } { 88 48 80 104 "D\[3\]" "" } { 216 48 80 232 "D\[4\]" "" } { 232 48 80 248 "D\[5\]" "" } { 248 48 80 264 "D\[6\]" "" } { 264 48 80 280 "D\[7\]" "" } { 392 48 80 408 "D\[8\]" "" } { 408 48 80 424 "D\[9\]" "" } { 424 48 85 440 "D\[10\]" "" } { 440 48 85 456 "D\[11\]" "" } { 568 48 83 584 "D\[12\]" "" } { 584 48 85 600 "D\[13\]" "" } { 600 48 85 616 "D\[14\]" "" } { 616 48 85 632 "D\[15\]" "" } { 744 48 83 760 "D\[16\]" "" } { 760 48 85 776 "D\[17\]" "" } { 776 48 85 792 "D\[18\]" "" } { 792 48 85 808 "D\[19\]" "" } { 920 48 83 936 "D\[20\]" "" } { 936 48 85 952 "D\[21\]" "" } { 968 48 80 984 "D\[23\]" "" } { 952 48 85 968 "D\[22\]" "" } { 1096 48 83 1112 "D\[24\]" "" } { 1112 48 85 1128 "D\[25\]" "" } { 1128 48 85 1144 "D\[26\]" "" } { 1144 48 85 1160 "D\[27\]" "" } { 1272 48 83 1288 "D\[28\]" "" } { 1288 48 85 1304 "D\[29\]" "" } { 1304 48 85 1320 "D\[30\]" "" } { 1320 48 85 1336 "D\[31\]" "" } { -8 64 128 8 "D\[31..0\]" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.700 ns) + CELL(0.500 ns) 6.700 ns 74175:inst\|13 2 REG LC2_C17 5 " "Info: 2: + IC(2.700 ns) + CELL(0.500 ns) = 6.700 ns; Loc. = LC2_C17; Fanout = 5; REG Node = '74175:inst\|13'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.200 ns" { D[3] 74175:inst|13 } "NODE_NAME" } } { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 504 352 416 584 "13" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.000 ns ( 59.70 % ) " "Info: Total cell delay = 4.000 ns ( 59.70 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.700 ns ( 40.30 % ) " "Info: Total interconnect delay = 2.700 ns ( 40.30 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.700 ns" { D[3] 74175:inst|13 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "6.700 ns" { D[3] D[3]~out 74175:inst|13 } { 0.000ns 0.000ns 2.700ns } { 0.000ns 3.500ns 0.500ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 504 352 416 584 "13" "" } } } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 1.800 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 1.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns clk 1 CLK PIN_79 32 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_79; Fanout = 32; CLK Node = 'clk'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 1408 -152 16 1424 "clk" "" } { 344 16 80 360 "clk" "" } { 520 16 80 536 "clk" "" } { 696 16 80 712 "clk" "" } { 872 16 80 888 "clk" "" } { 1048 16 80 1064 "clk" "" } { 1224 16 80 1240 "clk" "" } { 1400 16 80 1416 "clk" "" } { 168 56 80 184 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 1.800 ns 74175:inst\|13 2 REG LC2_C17 5 " "Info: 2: + IC(0.300 ns) + CELL(0.000 ns) = 1.800 ns; Loc. = LC2_C17; Fanout = 5; REG Node = '74175:inst\|13'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { clk 74175:inst|13 } "NODE_NAME" } } { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 504 352 416 584 "13" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.500 ns ( 83.33 % ) " "Info: Total cell delay = 1.500 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.300 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { clk 74175:inst|13 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { clk clk~out 74175:inst|13 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.700 ns" { D[3] 74175:inst|13 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "6.700 ns" { D[3] D[3]~out 74175:inst|13 } { 0.000ns 0.000ns 2.700ns } { 0.000ns 3.500ns 0.500ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { clk 74175:inst|13 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { clk clk~out 74175:inst|13 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk OB 74175:inst17\|16 18.700 ns register " "Info: tco from clock \"clk\" to destination pin \"OB\" through register \"74175:inst17\|16\" is 18.700 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 1.800 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 1.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns clk 1 CLK PIN_79 32 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_79; Fanout = 32; CLK Node = 'clk'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 1408 -152 16 1424 "clk" "" } { 344 16 80 360 "clk" "" } { 520 16 80 536 "clk" "" } { 696 16 80 712 "clk" "" } { 872 16 80 888 "clk" "" } { 1048 16 80 1064 "clk" "" } { 1224 16 80 1240 "clk" "" } { 1400 16 80 1416 "clk" "" } { 168 56 80 184 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 1.800 ns 74175:inst17\|16 2 REG LC5_C35 9 " "Info: 2: + IC(0.300 ns) + CELL(0.000 ns) = 1.800 ns; Loc. = LC5_C35; Fanout = 9; REG Node = '74175:inst17\|16'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { clk 74175:inst17|16 } "NODE_NAME" } } { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 40 352 416 120 "16" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.500 ns ( 83.33 % ) " "Info: Total cell delay = 1.500 ns ( 83.33 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.300 ns ( 16.67 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { clk 74175:inst17|16 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { clk clk~out 74175:inst17|16 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.400 ns + " "Info: + Micro clock to output delay of source is 0.400 ns" { } { { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 40 352 416 120 "16" "" } } } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "16.500 ns + Longest register pin " "Info: + Longest register to pin delay is 16.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns 74175:inst17\|16 1 REG LC5_C35 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC5_C35; Fanout = 9; REG Node = '74175:inst17\|16'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { 74175:inst17|16 } "NODE_NAME" } } { "74175.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/74175.bdf" { { 40 352 416 120 "16" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(0.900 ns) 3.100 ns 74151:inst26\|f74151:sub\|72~228 2 COMB LC5_C9 1 " "Info: 2: + IC(2.200 ns) + CELL(0.900 ns) = 3.100 ns; Loc. = LC5_C9; Fanout = 1; COMB Node = '74151:inst26\|f74151:sub\|72~228'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.100 ns" { 74175:inst17|16 74151:inst26|f74151:sub|72~228 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 280 488 552 320 "72" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(0.900 ns) 4.200 ns 74151:inst21\|f74151:sub\|68~152 3 COMB LC4_C9 1 " "Info: 3: + IC(0.200 ns) + CELL(0.900 ns) = 4.200 ns; Loc. = LC4_C9; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|68~152'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.100 ns" { 74151:inst26|f74151:sub|72~228 74151:inst21|f74151:sub|68~152 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 272 400 464 312 "68" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.200 ns) 6.400 ns 74151:inst21\|f74151:sub\|68~153 4 COMB LC7_C13 1 " "Info: 4: + IC(1.000 ns) + CELL(1.200 ns) = 6.400 ns; Loc. = LC7_C13; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|68~153'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.200 ns" { 74151:inst21|f74151:sub|68~152 74151:inst21|f74151:sub|68~153 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 272 400 464 312 "68" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.700 ns) + CELL(1.100 ns) 9.200 ns 74151:inst21\|f74151:sub\|78~3 5 COMB LC6_C26 1 " "Info: 5: + IC(1.700 ns) + CELL(1.100 ns) = 9.200 ns; Loc. = LC6_C26; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|78~3'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.800 ns" { 74151:inst21|f74151:sub|68~153 74151:inst21|f74151:sub|78~3 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 272 640 704 312 "78" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.100 ns) 10.500 ns 74151:inst21\|f74151:sub\|81~4 6 COMB LC7_C26 1 " "Info: 6: + IC(0.200 ns) + CELL(1.100 ns) = 10.500 ns; Loc. = LC7_C26; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|81~4'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { 74151:inst21|f74151:sub|78~3 74151:inst21|f74151:sub|81~4 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 448 808 872 488 "81" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(4.600 ns) 16.500 ns OB 7 PIN PIN_11 0 " "Info: 7: + IC(1.400 ns) + CELL(4.600 ns) = 16.500 ns; Loc. = PIN_11; Fanout = 0; PIN Node = 'OB'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.000 ns" { 74151:inst21|f74151:sub|81~4 OB } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 360 800 976 376 "OB" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.800 ns ( 59.39 % ) " "Info: Total cell delay = 9.800 ns ( 59.39 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.700 ns ( 40.61 % ) " "Info: Total interconnect delay = 6.700 ns ( 40.61 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "16.500 ns" { 74175:inst17|16 74151:inst26|f74151:sub|72~228 74151:inst21|f74151:sub|68~152 74151:inst21|f74151:sub|68~153 74151:inst21|f74151:sub|78~3 74151:inst21|f74151:sub|81~4 OB } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "16.500 ns" { 74175:inst17|16 74151:inst26|f74151:sub|72~228 74151:inst21|f74151:sub|68~152 74151:inst21|f74151:sub|68~153 74151:inst21|f74151:sub|78~3 74151:inst21|f74151:sub|81~4 OB } { 0.000ns 2.200ns 0.200ns 1.000ns 1.700ns 0.200ns 1.400ns } { 0.000ns 0.900ns 0.900ns 1.200ns 1.100ns 1.100ns 4.600ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { clk 74175:inst17|16 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { clk clk~out 74175:inst17|16 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "16.500 ns" { 74175:inst17|16 74151:inst26|f74151:sub|72~228 74151:inst21|f74151:sub|68~152 74151:inst21|f74151:sub|68~153 74151:inst21|f74151:sub|78~3 74151:inst21|f74151:sub|81~4 OB } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "16.500 ns" { 74175:inst17|16 74151:inst26|f74151:sub|72~228 74151:inst21|f74151:sub|68~152 74151:inst21|f74151:sub|68~153 74151:inst21|f74151:sub|78~3 74151:inst21|f74151:sub|81~4 OB } { 0.000ns 2.200ns 0.200ns 1.000ns 1.700ns 0.200ns 1.400ns } { 0.000ns 0.900ns 0.900ns 1.200ns 1.100ns 1.100ns 4.600ns } } } } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "A OB 22.500 ns Longest " "Info: Longest tpd from source pin \"A\" to destination pin \"OB\" is 22.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns A 1 PIN PIN_45 67 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_45; Fanout = 67; PIN Node = 'A'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { A } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 56 432 600 72 "A" "" } { 272 600 672 288 "A" "" } { 496 600 672 512 "A" "" } { 720 600 672 736 "A" "" } { 944 600 672 960 "A" "" } { 1168 600 672 1184 "A" "" } { 1392 600 672 1408 "A" "" } { 48 624 672 64 "A" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.800 ns) + CELL(1.100 ns) 9.400 ns 74151:inst6\|f74151:sub\|70~158 2 COMB LC2_C2 3 " "Info: 2: + IC(4.800 ns) + CELL(1.100 ns) = 9.400 ns; Loc. = LC2_C2; Fanout = 3; COMB Node = '74151:inst6\|f74151:sub\|70~158'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.900 ns" { A 74151:inst6|f74151:sub|70~158 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 592 400 464 632 "70" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(1.200 ns) 12.600 ns 74151:inst21\|f74151:sub\|70~155 3 COMB LC6_C24 1 " "Info: 3: + IC(2.000 ns) + CELL(1.200 ns) = 12.600 ns; Loc. = LC6_C24; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|70~155'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.200 ns" { 74151:inst6|f74151:sub|70~158 74151:inst21|f74151:sub|70~155 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 592 400 464 632 "70" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(0.700 ns) 14.200 ns 74151:inst21\|f74151:sub\|74~10 4 COMB LC1_C26 1 " "Info: 4: + IC(0.900 ns) + CELL(0.700 ns) = 14.200 ns; Loc. = LC1_C26; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|74~10'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.600 ns" { 74151:inst21|f74151:sub|70~155 74151:inst21|f74151:sub|74~10 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 600 488 552 640 "74" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 15.400 ns 74151:inst21\|f74151:sub\|77~3 5 COMB LC2_C26 1 " "Info: 5: + IC(0.000 ns) + CELL(1.200 ns) = 15.400 ns; Loc. = LC2_C26; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|77~3'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.200 ns" { 74151:inst21|f74151:sub|74~10 74151:inst21|f74151:sub|77~3 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 448 632 696 488 "77" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(0.900 ns) 16.500 ns 74151:inst21\|f74151:sub\|81~4 6 COMB LC7_C26 1 " "Info: 6: + IC(0.200 ns) + CELL(0.900 ns) = 16.500 ns; Loc. = LC7_C26; Fanout = 1; COMB Node = '74151:inst21\|f74151:sub\|81~4'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.100 ns" { 74151:inst21|f74151:sub|77~3 74151:inst21|f74151:sub|81~4 } "NODE_NAME" } } { "f74151.bdf" "" { Schematic "c:/altera/quartus60/libraries/others/maxplus2/f74151.bdf" { { 448 808 872 488 "81" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(4.600 ns) 22.500 ns OB 7 PIN PIN_11 0 " "Info: 7: + IC(1.400 ns) + CELL(4.600 ns) = 22.500 ns; Loc. = PIN_11; Fanout = 0; PIN Node = 'OB'" { } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.000 ns" { 74151:inst21|f74151:sub|81~4 OB } "NODE_NAME" } } { "smdisplay.bdf" "" { Schematic "C:/altera/ym/text8/smdisplay.bdf" { { 360 800 976 376 "OB" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "13.200 ns ( 58.67 % ) " "Info: Total cell delay = 13.200 ns ( 58.67 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.300 ns ( 41.33 % ) " "Info: Total interconnect delay = 9.300 ns ( 41.33 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "22.500 ns" { A 74151:inst6|f74151:sub|70~158 74151:inst21|f74151:sub|70~155 74151:inst21|f74151:sub|74~10 74151:inst21|f74151:sub|77~3 74151:inst21|f74151:sub|81~4 OB } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "22.500 ns" { A A~out 74151:inst6|f74151:sub|70~158 74151:inst21|f74151:sub|70~155 74151:inst21|f74151:sub|74~10 74151:inst21|f74151:sub|77~3 74151:inst21|f74151:sub|81~4 OB } { 0.000ns 0.000ns 4.800ns 2.000ns 0.900ns 0.000ns 0.200ns 1.400ns } { 0.000ns 3.500ns 1.100ns 1.200ns 0.700ns 1.200ns 0.900ns 4.600ns } } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
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