control.tan.qmsg

是一些很好的FPGA设计实例

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "en " "Info: Assuming node \"en\" is an undefined clock" {  } { { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 2 -1 0 } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "en" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "en register i\[0\] register DATA\[4\]~reg0 47.39 MHz 21.1 ns Internal " "Info: Clock \"en\" has Internal fmax of 47.39 MHz between source register \"i\[0\]\" and destination register \"DATA\[4\]~reg0\" (period= 21.1 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "20.100 ns + Longest register register " "Info: + Longest register to register delay is 20.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns i\[0\] 1 REG LC1_A24 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_A24; Fanout = 4; REG Node = 'i\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { i[0] } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(0.500 ns) 1.500 ns Equal1~373 2 COMB LC7_A23 1 " "Info: 2: + IC(1.000 ns) + CELL(0.500 ns) = 1.500 ns; Loc. = LC7_A23; Fanout = 1; COMB Node = 'Equal1~373'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.500 ns" { i[0] Equal1~373 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 2.700 ns Equal1~357 3 COMB LC8_A23 1 " "Info: 3: + IC(0.000 ns) + CELL(1.200 ns) = 2.700 ns; Loc. = LC8_A23; Fanout = 1; COMB Node = 'Equal1~357'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.200 ns" { Equal1~373 Equal1~357 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(0.900 ns) 4.600 ns Equal1~333 4 COMB LC1_A36 1 " "Info: 4: + IC(1.000 ns) + CELL(0.900 ns) = 4.600 ns; Loc. = LC1_A36; Fanout = 1; COMB Node = 'Equal1~333'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.900 ns" { Equal1~357 Equal1~333 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.800 ns) + CELL(1.200 ns) 6.600 ns i~431 5 COMB LC1_A34 56 " "Info: 5: + IC(0.800 ns) + CELL(1.200 ns) = 6.600 ns; Loc. = LC1_A34; Fanout = 56; COMB Node = 'i~431'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { Equal1~333 i~431 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(1.100 ns) 8.600 ns Equal2~723 6 COMB LC7_A33 1 " "Info: 6: + IC(0.900 ns) + CELL(1.100 ns) = 8.600 ns; Loc. = LC7_A33; Fanout = 1; COMB Node = 'Equal2~723'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { i~431 Equal2~723 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(0.800 ns) 9.600 ns Equal2~747 7 COMB LC2_A33 1 " "Info: 7: + IC(0.200 ns) + CELL(0.800 ns) = 9.600 ns; Loc. = LC2_A33; Fanout = 1; COMB Node = 'Equal2~747'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.000 ns" { Equal2~723 Equal2~747 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 10.800 ns Equal2~728 8 COMB LC3_A33 1 " "Info: 8: + IC(0.000 ns) + CELL(1.200 ns) = 10.800 ns; Loc. = LC3_A33; Fanout = 1; COMB Node = 'Equal2~728'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.200 ns" { Equal2~747 Equal2~728 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.200 ns) 12.200 ns Equal2~710 9 COMB LC6_A33 1 " "Info: 9: + IC(0.200 ns) + CELL(1.200 ns) = 12.200 ns; Loc. = LC6_A33; Fanout = 1; COMB Node = 'Equal2~710'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { Equal2~728 Equal2~710 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(0.900 ns) 14.400 ns Equal2~711 10 COMB LC5_A21 9 " "Info: 10: + IC(1.300 ns) + CELL(0.900 ns) = 14.400 ns; Loc. = LC5_A21; Fanout = 9; COMB Node = 'Equal2~711'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.200 ns" { Equal2~710 Equal2~711 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.100 ns) 15.700 ns Equal3~76 11 COMB LC2_A21 1 " "Info: 11: + IC(0.200 ns) + CELL(1.100 ns) = 15.700 ns; Loc. = LC2_A21; Fanout = 1; COMB Node = 'Equal3~76'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { Equal2~711 Equal3~76 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.100 ns) 17.800 ns WideOr4 12 COMB LC1_A19 5 " "Info: 12: + IC(1.000 ns) + CELL(1.100 ns) = 17.800 ns; Loc. = LC1_A19; Fanout = 5; COMB Node = 'WideOr4'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.100 ns" { Equal3~76 WideOr4 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(0.800 ns) 20.100 ns DATA\[4\]~reg0 13 REG LC8_A18 1 " "Info: 13: + IC(1.500 ns) + CELL(0.800 ns) = 20.100 ns; Loc. = LC8_A18; Fanout = 1; REG Node = 'DATA\[4\]~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.300 ns" { WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "12.000 ns ( 59.70 % ) " "Info: Total cell delay = 12.000 ns ( 59.70 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.100 ns ( 40.30 % ) " "Info: Total interconnect delay = 8.100 ns ( 40.30 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "20.100 ns" { i[0] Equal1~373 Equal1~357 Equal1~333 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "20.100 ns" { i[0] Equal1~373 Equal1~357 Equal1~333 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } { 0.000ns 1.000ns 0.000ns 1.000ns 0.800ns 0.900ns 0.200ns 0.000ns 0.200ns 1.300ns 0.200ns 1.000ns 1.500ns } { 0.000ns 0.500ns 1.200ns 0.900ns 1.200ns 1.100ns 0.800ns 1.200ns 1.200ns 0.900ns 1.100ns 1.100ns 0.800ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "en destination 1.800 ns + Shortest register " "Info: + Shortest clock path from clock \"en\" to destination register is 1.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns en 1 CLK PIN_79 62 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_79; Fanout = 62; CLK Node = 'en'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { en } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 1.800 ns DATA\[4\]~reg0 2 REG LC8_A18 1 " "Info: 2: + IC(0.300 ns) + CELL(0.000 ns) = 1.800 ns; Loc. = LC8_A18; Fanout = 1; REG Node = 'DATA\[4\]~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.500 ns ( 83.33 % ) " "Info: Total cell delay = 1.500 ns ( 83.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.300 ns ( 16.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "en source 1.800 ns - Longest register " "Info: - Longest clock path from clock \"en\" to source register is 1.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns en 1 CLK PIN_79 62 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_79; Fanout = 62; CLK Node = 'en'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { en } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 1.800 ns i\[0\] 2 REG LC1_A24 4 " "Info: 2: + IC(0.300 ns) + CELL(0.000 ns) = 1.800 ns; Loc. = LC1_A24; Fanout = 4; REG Node = 'i\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { en i[0] } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.500 ns ( 83.33 % ) " "Info: Total cell delay = 1.500 ns ( 83.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.300 ns ( 16.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en i[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out i[0] } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en i[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out i[0] } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.400 ns + " "Info: + Micro clock to output delay of source is 0.400 ns" {  } { { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "20.100 ns" { i[0] Equal1~373 Equal1~357 Equal1~333 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "20.100 ns" { i[0] Equal1~373 Equal1~357 Equal1~333 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } { 0.000ns 1.000ns 0.000ns 1.000ns 0.800ns 0.900ns 0.200ns 0.000ns 0.200ns 1.300ns 0.200ns 1.000ns 1.500ns } { 0.000ns 0.500ns 1.200ns 0.900ns 1.200ns 1.100ns 0.800ns 1.200ns 1.200ns 0.900ns 1.100ns 1.100ns 0.800ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en i[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out i[0] } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "DATA\[4\]~reg0 D\[1\] en 16.500 ns register " "Info: tsu for register \"DATA\[4\]~reg0\" (data pin = \"D\[1\]\", clock pin = \"en\") is 16.500 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "17.700 ns + Longest pin register " "Info: + Longest pin to register delay is 17.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns D\[1\] 1 PIN PIN_78 8 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_78; Fanout = 8; PIN Node = 'D\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { D[1] } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.100 ns) 2.900 ns Equal0~34 2 COMB LC5_A34 2 " "Info: 2: + IC(0.300 ns) + CELL(1.100 ns) = 2.900 ns; Loc. = LC5_A34; Fanout = 2; COMB Node = 'Equal0~34'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { D[1] Equal0~34 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.100 ns) 4.200 ns i~431 3 COMB LC1_A34 56 " "Info: 3: + IC(0.200 ns) + CELL(1.100 ns) = 4.200 ns; Loc. = LC1_A34; Fanout = 56; COMB Node = 'i~431'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { Equal0~34 i~431 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(1.100 ns) 6.200 ns Equal2~723 4 COMB LC7_A33 1 " "Info: 4: + IC(0.900 ns) + CELL(1.100 ns) = 6.200 ns; Loc. = LC7_A33; Fanout = 1; COMB Node = 'Equal2~723'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.000 ns" { i~431 Equal2~723 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(0.800 ns) 7.200 ns Equal2~747 5 COMB LC2_A33 1 " "Info: 5: + IC(0.200 ns) + CELL(0.800 ns) = 7.200 ns; Loc. = LC2_A33; Fanout = 1; COMB Node = 'Equal2~747'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.000 ns" { Equal2~723 Equal2~747 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 8.400 ns Equal2~728 6 COMB LC3_A33 1 " "Info: 6: + IC(0.000 ns) + CELL(1.200 ns) = 8.400 ns; Loc. = LC3_A33; Fanout = 1; COMB Node = 'Equal2~728'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.200 ns" { Equal2~747 Equal2~728 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.200 ns) 9.800 ns Equal2~710 7 COMB LC6_A33 1 " "Info: 7: + IC(0.200 ns) + CELL(1.200 ns) = 9.800 ns; Loc. = LC6_A33; Fanout = 1; COMB Node = 'Equal2~710'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { Equal2~728 Equal2~710 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(0.900 ns) 12.000 ns Equal2~711 8 COMB LC5_A21 9 " "Info: 8: + IC(1.300 ns) + CELL(0.900 ns) = 12.000 ns; Loc. = LC5_A21; Fanout = 9; COMB Node = 'Equal2~711'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.200 ns" { Equal2~710 Equal2~711 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 22 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.100 ns) 13.300 ns Equal3~76 9 COMB LC2_A21 1 " "Info: 9: + IC(0.200 ns) + CELL(1.100 ns) = 13.300 ns; Loc. = LC2_A21; Fanout = 1; COMB Node = 'Equal3~76'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.300 ns" { Equal2~711 Equal3~76 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.100 ns) 15.400 ns WideOr4 10 COMB LC1_A19 5 " "Info: 10: + IC(1.000 ns) + CELL(1.100 ns) = 15.400 ns; Loc. = LC1_A19; Fanout = 5; COMB Node = 'WideOr4'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.100 ns" { Equal3~76 WideOr4 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(0.800 ns) 17.700 ns DATA\[4\]~reg0 11 REG LC8_A18 1 " "Info: 11: + IC(1.500 ns) + CELL(0.800 ns) = 17.700 ns; Loc. = LC8_A18; Fanout = 1; REG Node = 'DATA\[4\]~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.300 ns" { WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.900 ns ( 67.23 % ) " "Info: Total cell delay = 11.900 ns ( 67.23 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.800 ns ( 32.77 % ) " "Info: Total interconnect delay = 5.800 ns ( 32.77 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "17.700 ns" { D[1] Equal0~34 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "17.700 ns" { D[1] D[1]~out Equal0~34 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns 0.200ns 0.900ns 0.200ns 0.000ns 0.200ns 1.300ns 0.200ns 1.000ns 1.500ns } { 0.000ns 1.500ns 1.100ns 1.100ns 1.100ns 0.800ns 1.200ns 1.200ns 0.900ns 1.100ns 1.100ns 0.800ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "en destination 1.800 ns - Shortest register " "Info: - Shortest clock path from clock \"en\" to destination register is 1.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.500 ns) 1.500 ns en 1 CLK PIN_79 62 " "Info: 1: + IC(0.000 ns) + CELL(1.500 ns) = 1.500 ns; Loc. = PIN_79; Fanout = 62; CLK Node = 'en'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { en } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(0.000 ns) 1.800 ns DATA\[4\]~reg0 2 REG LC8_A18 1 " "Info: 2: + IC(0.300 ns) + CELL(0.000 ns) = 1.800 ns; Loc. = LC8_A18; Fanout = 1; REG Node = 'DATA\[4\]~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.300 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "control.v" "" { Text "C:/altera/ym/text9/keyboard/control/control.v" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.500 ns ( 83.33 % ) " "Info: Total cell delay = 1.500 ns ( 83.33 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns ( 16.67 % ) " "Info: Total interconnect delay = 0.300 ns ( 16.67 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "17.700 ns" { D[1] Equal0~34 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "17.700 ns" { D[1] D[1]~out Equal0~34 i~431 Equal2~723 Equal2~747 Equal2~728 Equal2~710 Equal2~711 Equal3~76 WideOr4 DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns 0.200ns 0.900ns 0.200ns 0.000ns 0.200ns 1.300ns 0.200ns 1.000ns 1.500ns } { 0.000ns 1.500ns 1.100ns 1.100ns 1.100ns 0.800ns 1.200ns 1.200ns 0.900ns 1.100ns 1.100ns 0.800ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.800 ns" { en DATA[4]~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.800 ns" { en en~out DATA[4]~reg0 } { 0.000ns 0.000ns 0.300ns } { 0.000ns 1.500ns 0.000ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}