decide7.tan.qmsg

是一些很好的FPGA设计实例

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jan 14 22:30:20 2007 " "Info: Processing started: Sun Jan 14 22:30:20 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off decide7 -c decide7 " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off decide7 -c decide7" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "a\[0\] y 16.100 ns Longest " "Info: Longest tpd from source pin \"a\[0\]\" to destination pin \"y\" is 16.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns a\[0\] 1 PIN PIN_45 4 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_45; Fanout = 4; PIN Node = 'a\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { a[0] } "NODE_NAME" } } { "decide7.v" "" { Text "C:/altera/ym/text1/decide7.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(1.100 ns) 6.200 ns Add0~17 2 COMB LC1_F21 2 " "Info: 2: + IC(1.600 ns) + CELL(1.100 ns) = 6.200 ns; Loc. = LC1_F21; Fanout = 2; COMB Node = 'Add0~17'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { a[0] Add0~17 } "NODE_NAME" } } { "decide7.v" "" { Text "C:/altera/ym/text1/decide7.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(0.500 ns) 7.600 ns lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\] 3 COMB LC4_F24 1 " "Info: 3: + IC(0.900 ns) + CELL(0.500 ns) = 7.600 ns; Loc. = LC4_F24; Fanout = 1; COMB Node = 'lpm_add_sub:Add2\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { Add0~17 lpm_add_sub:Add2|addcore:adder|a_csnbuffer:result_node|cout[2] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.000 ns) 8.600 ns lpm_add_sub:Add2\|addcore:adder\|unreg_res_node\[3\] 4 COMB LC5_F24 1 " "Info: 4: + IC(0.000 ns) + CELL(1.000 ns) = 8.600 ns; Loc. = LC5_F24; Fanout = 1; COMB Node = 'lpm_add_sub:Add2\|addcore:adder\|unreg_res_node\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.000 ns" { lpm_add_sub:Add2|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add2|addcore:adder|unreg_res_node[3] } "NODE_NAME" } } { "addcore.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/addcore.tdf" 95 16 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.200 ns) 10.000 ns Add3~41 5 COMB LC7_F24 1 " "Info: 5: + IC(0.200 ns) + CELL(1.200 ns) = 10.000 ns; Loc. = LC7_F24; Fanout = 1; COMB Node = 'Add3~41'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { lpm_add_sub:Add2|addcore:adder|unreg_res_node[3] Add3~41 } "NODE_NAME" } } { "decide7.v" "" { Text "C:/altera/ym/text1/decide7.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(4.600 ns) 16.100 ns y 6 PIN PIN_24 0 " "Info: 6: + IC(1.500 ns) + CELL(4.600 ns) = 16.100 ns; Loc. = PIN_24; Fanout = 0; PIN Node = 'y'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.100 ns" { Add3~41 y } "NODE_NAME" } } { "decide7.v" "" { Text "C:/altera/ym/text1/decide7.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.900 ns ( 73.91 % ) " "Info: Total cell delay = 11.900 ns ( 73.91 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.200 ns ( 26.09 % ) " "Info: Total interconnect delay = 4.200 ns ( 26.09 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "16.100 ns" { a[0] Add0~17 lpm_add_sub:Add2|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add2|addcore:adder|unreg_res_node[3] Add3~41 y } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "16.100 ns" { a[0] a[0]~out Add0~17 lpm_add_sub:Add2|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add2|addcore:adder|unreg_res_node[3] Add3~41 y } { 0.000ns 0.000ns 1.600ns 0.900ns 0.000ns 0.200ns 1.500ns } { 0.000ns 3.500ns 1.100ns 0.500ns 1.000ns 1.200ns 4.600ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Jan 14 22:30:21 2007 " "Info: Processing ended: Sun Jan 14 22:30:21 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}