tellpw.bsf

是一些很好的FPGA设计实例

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
	(rect 16 16 184 144)
	(text "tellpw" (rect 5 0 42 15)(font "Arial" ))
	(text "inst" (rect 8 109 31 124)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "DIN[23..0]" (rect 0 0 63 15)(font "Arial" ))
		(text "DIN[23..0]" (rect 21 27 84 42)(font "Arial" ))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "DATA[23..0]" (rect 0 0 74 15)(font "Arial" ))
		(text "DATA[23..0]" (rect 21 43 95 58)(font "Arial" ))
		(line (pt 0 48)(pt 16 48)(line_width 3))
	)
	(port
		(pt 0 64)
		(input)
		(text "cfm" (rect 0 0 23 15)(font "Arial" ))
		(text "cfm" (rect 21 59 44 74)(font "Arial" ))
		(line (pt 0 64)(pt 16 64)(line_width 1))
	)
	(port
		(pt 168 32)
		(output)
		(text "ok" (rect 0 0 15 15)(font "Arial" ))
		(text "ok" (rect 132 27 147 42)(font "Arial" ))
		(line (pt 168 32)(pt 152 32)(line_width 1))
	)
	(port
		(pt 168 48)
		(output)
		(text "n[1..0]" (rect 0 0 38 15)(font "Arial" ))
		(text "n[1..0]" (rect 109 43 147 58)(font "Arial" ))
		(line (pt 168 48)(pt 152 48)(line_width 3))
	)
	(port
		(pt 168 64)
		(output)
		(text "lock" (rect 0 0 25 15)(font "Arial" ))
		(text "lock" (rect 122 59 147 74)(font "Arial" ))
		(line (pt 168 64)(pt 152 64)(line_width 1))
	)
	(port
		(pt 168 80)
		(output)
		(text "mis" (rect 0 0 24 15)(font "Arial" ))
		(text "mis" (rect 123 75 147 90)(font "Arial" ))
		(line (pt 168 80)(pt 152 80)(line_width 1))
	)
	(drawing
		(rectangle (rect 16 16 152 112)(line_width 1))
	)
)