adder4.tan.qmsg

是一些很好的FPGA设计实例

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 02 09:10:09 2007 " "Info: Processing started: Mon Apr 02 09:10:09 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off adder4 -c adder4 " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off adder4 -c adder4" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "cin cout 13.200 ns Longest " "Info: Longest tpd from source pin \"cin\" to destination pin \"cout\" is 13.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns cin 1 PIN PIN_125 1 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_125; Fanout = 1; PIN Node = 'cin'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { cin } "NODE_NAME" } } { "adder4.v" "" { Text "E:/altera/ADDER4/adder4.v" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(0.500 ns) 6.200 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\] 2 COMB LC1_D21 2 " "Info: 2: + IC(2.200 ns) + CELL(0.500 ns) = 6.200 ns; Loc. = LC1_D21; Fanout = 2; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { cin lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[0] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.100 ns) 6.300 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\] 3 COMB LC2_D21 2 " "Info: 3: + IC(0.000 ns) + CELL(0.100 ns) = 6.300 ns; Loc. = LC2_D21; Fanout = 2; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.100 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[0] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[1] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.100 ns) 6.400 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\] 4 COMB LC3_D21 2 " "Info: 4: + IC(0.000 ns) + CELL(0.100 ns) = 6.400 ns; Loc. = LC3_D21; Fanout = 2; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.100 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[1] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[2] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.100 ns) 6.500 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\] 5 COMB LC4_D21 2 " "Info: 5: + IC(0.000 ns) + CELL(0.100 ns) = 6.500 ns; Loc. = LC4_D21; Fanout = 2; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.100 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[3] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.100 ns) 6.600 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\] 6 COMB LC5_D21 1 " "Info: 6: + IC(0.000 ns) + CELL(0.100 ns) = 6.600 ns; Loc. = LC5_D21; Fanout = 1; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.100 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[3] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[4] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.000 ns) 7.600 ns lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[4\]~92 7 COMB LC6_D21 1 " "Info: 7: + IC(0.000 ns) + CELL(1.000 ns) = 7.600 ns; Loc. = LC6_D21; Fanout = 1; COMB Node = 'lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[4\]~92'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.000 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[4] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~92 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(4.600 ns) 13.200 ns cout 8 PIN PIN_30 0 " "Info: 8: + IC(1.000 ns) + CELL(4.600 ns) = 13.200 ns; Loc. = PIN_30; Fanout = 0; PIN Node = 'cout'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.600 ns" { lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~92 cout } "NODE_NAME" } } { "adder4.v" "" { Text "E:/altera/ADDER4/adder4.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "10.000 ns ( 75.76 % ) " "Info: Total cell delay = 10.000 ns ( 75.76 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.200 ns ( 24.24 % ) " "Info: Total interconnect delay = 3.200 ns ( 24.24 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "13.200 ns" { cin lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[0] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[1] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[3] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[4] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~92 cout } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "13.200 ns" { cin cin~out lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[0] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[1] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[2] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[3] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cout[4] lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~92 cout } { 0.000ns 0.000ns 2.200ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.000ns } { 0.000ns 3.500ns 0.500ns 0.100ns 0.100ns 0.100ns 0.100ns 1.000ns 4.600ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 02 09:10:10 2007 " "Info: Processing ended: Mon Apr 02 09:10:10 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}