bmq.tan.qmsg

是一些很好的FPGA设计实例

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Mar 24 15:30:50 2007 " "Info: Processing started: Sat Mar 24 15:30:50 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off bmq -c bmq " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off bmq -c bmq" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "in\[7\] out\[2\] 13.800 ns Longest " "Info: Longest tpd from source pin \"in\[7\]\" to destination pin \"out\[2\]\" is 13.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.500 ns) 3.500 ns in\[7\] 1 PIN PIN_57 2 " "Info: 1: + IC(0.000 ns) + CELL(3.500 ns) = 3.500 ns; Loc. = PIN_57; Fanout = 2; PIN Node = 'in\[7\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { in[7] } "NODE_NAME" } } { "bmq.v" "" { Text "E:/altera/encode/bmq.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(1.100 ns) 6.200 ns WideOr0~48 2 COMB LC2_F19 2 " "Info: 2: + IC(1.600 ns) + CELL(1.100 ns) = 6.200 ns; Loc. = LC2_F19; Fanout = 2; COMB Node = 'WideOr0~48'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.700 ns" { in[7] WideOr0~48 } "NODE_NAME" } } { "bmq.v" "" { Text "E:/altera/encode/bmq.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.200 ns) 7.600 ns WideOr0~50 3 COMB LC1_F19 1 " "Info: 3: + IC(0.200 ns) + CELL(1.200 ns) = 7.600 ns; Loc. = LC1_F19; Fanout = 1; COMB Node = 'WideOr0~50'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.400 ns" { WideOr0~48 WideOr0~50 } "NODE_NAME" } } { "bmq.v" "" { Text "E:/altera/encode/bmq.v" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(4.600 ns) 13.800 ns out\[2\] 4 PIN PIN_25 0 " "Info: 4: + IC(1.600 ns) + CELL(4.600 ns) = 13.800 ns; Loc. = PIN_25; Fanout = 0; PIN Node = 'out\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "6.200 ns" { WideOr0~50 out[2] } "NODE_NAME" } } { "bmq.v" "" { Text "E:/altera/encode/bmq.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "10.400 ns ( 75.36 % ) " "Info: Total cell delay = 10.400 ns ( 75.36 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.400 ns ( 24.64 % ) " "Info: Total interconnect delay = 3.400 ns ( 24.64 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "13.800 ns" { in[7] WideOr0~48 WideOr0~50 out[2] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "13.800 ns" { in[7] in[7]~out WideOr0~48 WideOr0~50 out[2] } { 0.000ns 0.000ns 1.600ns 0.200ns 1.600ns } { 0.000ns 3.500ns 1.100ns 1.200ns 4.600ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Mar 24 15:30:50 2007 " "Info: Processing ended: Sat Mar 24 15:30:50 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}