t_flip_flop.ucf

来自「是一些很好的FPGA设计实例」· UCF 代码 · 共 16 行

#PACE: Start of Constraints extracted by PACE from the Design
NET "reset" LOC = "P145"  ;
NET "enable" LOC = "P147"  ;
NET "cs<1>" LOC = "p176"  ;
NET "cs<0>" LOC = "p175"  ;
NET "clk" LOC = "P80"  ;

NET "q<0>" LOC = "p178";
NET "q<1>" LOC = "p179";
NET "q<2>" LOC = "p180";
NET "q<3>" LOC = "p181";
NET "q<4>" LOC = "p187";
NET "q<5>" LOC = "p188";
NET "q<6>" LOC = "p189";
NET "q<7>" LOC = "p191";