reg.ucf

是一些很好的FPGA设计实例

NET "cs<0>" LOC = "p175";
NET "cs<1>" LOC = "p176";

NET "datain<0>" LOC = "p110";
NET "datain<1>" LOC = "p111";
NET "datain<2>" LOC = "p112";
NET "datain<3>" LOC = "p113";
NET "datain<4>" LOC = "p114";
NET "datain<5>" LOC = "p115";
NET "datain<6>" LOC = "p116";
NET "datain<7>" LOC = "p120";

NET "q<0>" LOC = "p178";
NET "q<1>" LOC = "p179";
NET "q<2>" LOC = "p180";
NET "q<3>" LOC = "p181";
NET "q<4>" LOC = "p187";
NET "q<5>" LOC = "p188";
NET "q<6>" LOC = "p189";
NET "q<7>" LOC = "p191";

NET "clk" LOC = "p80";
NET "enable" LOC = "p147";