pwm_gen.tan.rpt

来自「pwm模块pwm模块pwm模块pwm模块pwm模块」· RPT 代码 · 共 274 行 · 第 1/5 页

; Timing Analyzer Settings                                                                                           ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                              ; Setting            ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                         ; EPM3128ATC100-10   ;      ;    ;             ;
; Timing Models                                                       ; Final              ;      ;    ;             ;
; Default hold multicycle                                             ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                           ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                              ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                      ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                    ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                               ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                             ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                    ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                       ; Off                ;      ;    ;             ;
; Number of source nodes to report per destination node               ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                               ; 10                 ;      ;    ;             ;
; Number of paths to report                                           ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                        ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                              ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                          ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                        ; Off                ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis      ; Off                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off                ;      ;    ;             ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clock_24M       ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clock_24M'                                                                                                                                                                                                                                                                                            ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------+----------------------------------------------------+------------+-----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                              ; To                                                 ; From Clock ; To Clock  ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------+----------------------------------------------------+------------+-----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[4]                    ; serialport_tx:inst5|idata[6]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[3]                    ; serialport_tx:inst5|idata[6]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[2]                    ; serialport_tx:inst5|idata[6]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[0]                    ; serialport_tx:inst5|idata[6]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[1]                    ; serialport_tx:inst5|idata[6]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[4]                    ; serialport_tx:inst5|idata[5]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[3]                    ; serialport_tx:inst5|idata[5]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[2]                    ; serialport_tx:inst5|idata[5]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[0]                    ; serialport_tx:inst5|idata[5]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[1]                    ; serialport_tx:inst5|idata[5]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[4]                    ; serialport_tx:inst5|idata[1]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[3]                    ; serialport_tx:inst5|idata[1]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;
; N/A                                     ; 47.17 MHz ( period = 21.200 ns )                    ; pwm_counter:inst|byte_index[0]                    ; serialport_tx:inst5|idata[1]                       ; clock_24M  ; clock_24M ; None                        ; None                      ; 12.900 ns               ;