pianyi.fit

基于vhdl的qpsk算法研究与性能测试

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 10/29/2008 08:24:33      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "pianyi"
BEGIN

    DEVICE = "EPM7032LC44-6";

    "CP"                           : INPUT_PIN  = 43     ;
    "QO0"                          : OUTPUT_PIN = 28     ; -- LC28
    "QO1"                          : OUTPUT_PIN = 27     ; -- LC29
    "QO2"                          : OUTPUT_PIN = 26     ; -- LC30
    "QO3"                          : OUTPUT_PIN = 25     ; -- LC31
    "QO4"                          : OUTPUT_PIN = 29     ; -- LC27
    "QO5"                          : OUTPUT_PIN = 41     ; -- LC17
    ":14"                          : LOCATION   = LC25   ; -- PIN 32  -- Q11
    ":16"                          : LOCATION   = LC24   ; -- PIN 33  -- A7
    ":17"                          : LOCATION   = LC23   ; -- PIN 34  -- A6
    ":18"                          : LOCATION   = LC22   ; -- PIN 36  -- A5
    ":19"                          : LOCATION   = LC21   ; -- PIN 37  -- A4
    ":20"                          : LOCATION   = LC20   ; -- PIN 38  -- A3
    ":21"                          : LOCATION   = LC19   ; -- PIN 39  -- A2
    ":22"                          : LOCATION   = LC18   ; -- PIN 40  -- A1
    ":23"                          : LOCATION   = LC26   ; -- PIN 31  -- A0

END;

INTERNAL_INFO "pianyi"
BEGIN
	DEVICE = EPM7032LC44-6;
	LC17    : LORAX = "G13R0,PA7R0C1";
	LC27    : LORAX = "G40R0";
	LC31    : LORAX = "G57R0";
	LC30    : LORAX = "G56R0";
	LC29    : LORAX = "G55R0";
	LC28    : LORAX = "G41R0";
	LC26    : LORAX = "G39R0,PA21R0C1";
	LC19    : LORAX = "G15R0,PA3R0C1";
	LC21    : LORAX = "G30R0,PA16R0C1";
	LC23    : LORAX = "G32R0,PA12R0C1";
	LC25    : LORAX = "G38R0,PA18R0C1";
	LC18    : LORAX = "G14R0,PA5R0C1";
	LC20    : LORAX = "G16R0,PA1R0C1";
	LC22    : LORAX = "G31R0,PA14R0C1";
	LC24    : LORAX = "G33R0,PA10R0C1";
END;