qpsk.rpt

基于vhdl的qpsk算法研究与性能测试

LC37 -> - - - * * | - - * - * * * * | <-- |SUOCUNF:5|SAV6
LC39 -> - - - * * | - - * - * * * * | <-- |SUOCUNF:5|SAV5


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 e:\vhdcx\qpsk.rpt
qpsk

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                         Logic cells placed in LAB 'H'
        +------------------------------- LC123 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|cout_node
        | +----------------------------- LC119 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|gcp2
        | | +--------------------------- LC121 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|g4
        | | | +------------------------- LC114 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node1
        | | | | +----------------------- LC120 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node2
        | | | | | +--------------------- LC124 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node3
        | | | | | | +------------------- LC126 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node4
        | | | | | | | +----------------- LC127 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node5
        | | | | | | | | +--------------- LC128 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node6
        | | | | | | | | | +------------- LC122 |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node7
        | | | | | | | | | | +----------- LC125 CS
        | | | | | | | | | | | +--------- LC116 |CUN1:2|N4~58~fit~in1
        | | | | | | | | | | | | +------- LC118 N0
        | | | | | | | | | | | | | +----- LC117 N1
        | | | | | | | | | | | | | | +--- LC113 |SUOCUNF:5|SAV8
        | | | | | | | | | | | | | | | +- LC115 |SUOCUNF:5|SAV0
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':
LC119-> - - - - - * - - - - - - - - - - | - - - - - - - * | <-- |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|gcp2
LC121-> - - - - - - * * - - - - - - - - | - - - - - - - * | <-- |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|g4
LC113-> - - - - - - - - - - - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV8
LC115-> * * * * * - - - * * - - - - - * | - - - - - - - * | <-- |SUOCUNF:5|SAV0

Pin
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- CP
LC46 -> - - - - - - - - - - - - - - * - | - - - - - - - * | <-- |ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder1|result_node0
LC86 -> - - - - - - - - - - - - - * - - | - - - - - - - * | <-- |CUN1:2|N1~58~fit~in1
LC65 -> - - - - - - - - - - - * * - * * | - - * * * * * * | <-- |FP2:17|TEMP1
LC51 -> - - - - - - - - - - - - - - * * | - - * - - - - * | <-- |PZ:4|:2
LC33 -> - - - - - - - - - - - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV10
LC34 -> - - - - - - - - - - - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV9
LC35 -> * - - - - - - - - * - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV7
LC37 -> * - - - - - - - * * - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV6
LC39 -> * - - - - - - * * * - * * - - - | - - * - * * * * | <-- |SUOCUNF:5|SAV5
LC41 -> * - - - - - * * * * - - - - - - | - - - - - - - * | <-- |SUOCUNF:5|SAV4
LC40 -> * - * - - * - - * * - - - - - - | - - - - - - - * | <-- |SUOCUNF:5|SAV3
LC38 -> * * * - * - - - * * - - - - - - | - - - - - - - * | <-- |SUOCUNF:5|SAV2
LC36 -> * * * * * - - - * * - - - - - - | - - - - - - - * | <-- |SUOCUNF:5|SAV1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 e:\vhdcx\qpsk.rpt
qpsk

** EQUATIONS **

CP       : INPUT;

-- Node name is 'CD' = '|FP2:17|TEMP2' 
-- Equation name is 'CD', type is output 
 CD      = TFFE( _EQ001, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ001 =  _LC001 &  _LC065;

-- Node name is 'CS' 
-- Equation name is 'CS', location is LC125, type is output.
 CS      = LCELL( GND $  GND);

-- Node name is 'CW' = '|FP2:17|TEM1' 
-- Equation name is 'CW', type is output 
 CW      = DFFE( _EQ002 $ !_LC065, GLOBAL( CP),  VCC,  VCC,  VCC);
  _EQ002 =  CD &  CW &  _LC001 &  _LC065 &  _LC081 &  _LC082 &  _LC083 & 
              _LC084 &  _LC088 &  _LC089 &  _LC090 &  _LC092 &  _LC095 & 
              _LC096;

-- Node name is 'N0' = '|CUN1:2|N0~58' 
-- Equation name is 'N0', type is output 
 N0      = DFFE( _EQ003 $  _EQ004,  _LC065,  VCC,  VCC,  VCC);
  _EQ003 =  _LC033 &  _LC034 & !_LC035 & !_LC037 &  _X001 &  _X002 &  _X003 & 
              _X004 &  _X005
         # !_LC034 &  _LC035 & !_LC039 & !_LC113 &  _X001 &  _X002 &  _X003 & 
              _X004 &  _X005
         #  _LC034 &  _LC035 &  _LC039 &  _X001 &  _X002 &  _X003 &  _X004 & 
              _X005;
  _X001  = EXP( _LC034 & !_LC039 &  _LC113);
  _X002  = EXP(!_LC034 &  _LC037 &  _LC039);
  _X003  = EXP(!_LC035 & !_LC037 &  _LC039);
  _X004  = EXP(!_LC034 &  _LC037 & !_LC113);
  _X005  = EXP(!_LC035 & !_LC037 &  _LC113);
  _EQ004 =  _X001 &  _X002 &  _X003 &  _X004 &  _X005;
  _X001  = EXP( _LC034 & !_LC039 &  _LC113);
  _X002  = EXP(!_LC034 &  _LC037 &  _LC039);
  _X003  = EXP(!_LC035 & !_LC037 &  _LC039);
  _X004  = EXP(!_LC034 &  _LC037 & !_LC113);
  _X005  = EXP(!_LC035 & !_LC037 &  _LC113);

-- Node name is 'N1' = '|CUN1:2|N1~58' 
-- Equation name is 'N1', type is output 
 N1      = LCELL( _LC086 $  GND);

-- Node name is 'N2' = '|CUN1:2|N2~58' 
-- Equation name is 'N2', type is output 
 N2      = LCELL( _LC044 $  GND);

-- Node name is 'N3' = '|CUN1:2|N3~58' 
-- Equation name is 'N3', type is output 
 N3      = LCELL( _LC066 $  GND);

-- Node name is 'N4' = '|CUN1:2|N4~58' 
-- Equation name is 'N4', type is output 
 N4      = LCELL( _LC116 $  GND);

-- Node name is 'N5' = '|CUN1:2|N5~58' 
-- Equation name is 'N5', type is output 
 N5      = DFFE( _EQ005 $ !_LC033,  _LC065,  VCC,  VCC,  VCC);
  _EQ005 =  _X006 &  _X007 &  _X008 &  _X009 &  _X010 &  _X011;
  _X006  = EXP(!_LC035 &  _LC037 &  _LC039);
  _X007  = EXP(!_LC033 & !_LC034 & !_LC035 & !_LC037 & !_LC039 & !_LC113);
  _X008  = EXP(!_LC034 &  _LC039 &  _LC113);
  _X009  = EXP(!_LC034 &  _LC037 &  _LC113);
  _X010  = EXP( _LC035 & !_LC037);
  _X011  = EXP( _LC034 & !_LC113);

-- Node name is 'N6' = '|CUN1:2|N6~58' 
-- Equation name is 'N6', type is output 
 N6      = DFFE( _EQ006 $  _LC033,  _LC065,  VCC,  VCC,  VCC);
  _EQ006 =  _X012 &  _X013 &  _X014 &  _X015 &  _X016 &  _X017 &  _X018;
  _X012  = EXP(!_LC033 & !_LC034 & !_LC035 &  _LC039 & !_LC113);
  _X013  = EXP(!_LC033 & !_LC034 & !_LC035 &  _LC037 & !_LC113);
  _X014  = EXP(!_LC033 & !_LC034 &  _LC035 & !_LC037 & !_LC113);
  _X015  = EXP( _LC034 &  _LC037 &  _LC039 &  _LC113);
  _X016  = EXP( _LC033 & !_LC034 & !_LC035 & !_LC113);
  _X017  = EXP( _LC033 & !_LC034 & !_LC037 & !_LC113);
  _X018  = EXP( _LC034 &  _LC035 &  _LC113);

-- Node name is 'N7' = '|CUN1:2|N7~58' 
-- Equation name is 'N7', type is output 
 N7      = DFFE( _EQ007 $ !_LC033,  _LC065,  VCC,  VCC,  VCC);
  _EQ007 = !_LC033 & !_LC034 & !_LC035 & !_LC037 & !_LC039 & !_LC113;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|cout_node' from file "addcore.tdf" line 165, column 5
-- Equation name is '_LC123', type is buried 
_LC123   = LCELL( _EQ008 $  GND);
  _EQ008 =  _LC035 &  _LC037 &  _LC038 &  _LC039 &  _LC040 &  _LC041 & 
              _LC115
         #  _LC035 &  _LC036 &  _LC037 &  _LC038 &  _LC039 &  _LC040 & 
              _LC041;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|gcp2' from file "addcore.tdf" line 160, column 8
-- Equation name is '_LC119', type is buried 
_LC119   = LCELL( _EQ009 $  _LC038);
  _EQ009 = !_LC036 &  _LC038 & !_LC115;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|g4' from file "addcore.tdf" line 158, column 5
-- Equation name is '_LC121', type is buried 
_LC121   = LCELL( _EQ010 $  GND);
  _EQ010 =  _LC036 &  _LC038 &  _LC040
         #  _LC038 &  _LC040 &  _LC115;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node1' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC114', type is buried 
_LC114   = LCELL(!_LC036 $  _LC115);

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC120', type is buried 
_LC120   = LCELL(!_LC038 $  _EQ011);
  _EQ011 = !_LC036 & !_LC115;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node3' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC124', type is buried 
_LC124   = LCELL( _LC040 $  _LC119);

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node4' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC126', type is buried 
_LC126   = LCELL( _LC041 $  _LC121);

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node5' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC127', type is buried 
_LC127   = LCELL( _LC039 $  _EQ012);
  _EQ012 =  _LC041 &  _LC121;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node6' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC128', type is buried 
_LC128   = LCELL( _EQ013 $  _LC037);
  _EQ013 =  _LC036 &  _LC038 &  _LC039 &  _LC040 &  _LC041
         #  _LC038 &  _LC039 &  _LC040 &  _LC041 &  _LC115;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder0|result_node7' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC122', type is buried 
_LC122   = LCELL( _EQ014 $  _LC035);
  _EQ014 =  _LC036 &  _LC037 &  _LC038 &  _LC039 &  _LC040 &  _LC041
         #  _LC037 &  _LC038 &  _LC039 &  _LC040 &  _LC041 &  _LC115;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder1|result_node0' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC046', type is buried 
_LC046   = LCELL( _LC113 $  _LC123);

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder1|result_node1' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC047', type is buried 
_LC047   = LCELL( _LC034 $  _EQ015);
  _EQ015 =  _LC113 &  _LC123;

-- Node name is '|ADD1:1|LPM_ADD_SUB:56|addcore:adder|addcore:adder1|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC045', type is buried 
_LC045   = LCELL( _LC033 $  _EQ016);
  _EQ016 =  _LC034 &  _LC113 &  _LC123;

-- Node name is '|CUN1:2|~22~fit~in1' = '|CUN1:2|N1~58~fit~in1' 
-- Equation name is '_LC086', type is buried 
-- synthesized logic cell 
_LC086   = DFFE( _EQ017 $  VCC,  _LC065,  VCC,  VCC,  VCC);
  _EQ017 =  _X016 &  _X017 &  _X019 &  _X020 &  _X021 &  _X022 &  _X023 & 
              _X024 &  _X025 &  _X026 &  _X027 &  _X028 &  _X029 &  _X030 & 
              _X031 &  _X032;
  _X016  = EXP( _LC033 & !_LC034 & !_LC035 & !_LC113);
  _X017  = EXP( _LC033 & !_LC034 & !_LC037 & !_LC113);
  _X019  = EXP(!_LC033 & !_LC035 & !_LC037 & !_LC039);
  _X020  = EXP( _LC033 &  _LC035 & !_LC037 &  _LC039 & !_LC113);
  _X021  = EXP(!_LC033 & !_LC034 &  _LC035 &  _LC037 &  _LC039 &  _LC113);
  _X022  = EXP( _LC033 & !_LC034 &  _LC039 & !_LC113);