pll.fit.qmsg

来自「TI公司的TLC5510的用VHDL写的控制器及其仿真」· QMSG 代码 · 共 9 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon May 04 10:14:38 2009 " "Info: Processing started: Mon May 04 10:14:38 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off pll -c pll " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off pll -c pll" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "pll EP2C8T144C8 " "Info: Selected device EP2C8T144C8 for design \"pll\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "high junction temperature 85 " "Warning: The high junction temperature operating condition is not set. Assuming a default value of '85'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "low junction temperature 0 " "Warning: The low junction temperature operating condition is not set. Assuming a default value of '0'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Error" "ECUT_CUT_PLL_COMPUTATION_FAILED" "altpll:altpll_component\|pll Cyclone II " "Error: Can't implement PLL \"altpll:altpll_component\|pll\" as Cyclone II PLL type" { { "Error" "ECUT_CUT_YGR_PLL_CANNOT_ACHIEVE_RATIO" "altpll:altpll_component\|pll " "Error: Can't implement clock multiplication and clock division parameter values for PLL \"altpll:altpll_component\|pll\"" { { "Error" "ECUT_CUT_YGR_PLL_FAIL_REASON" "Division and Multiplication cannot be achieved " "Error: Can't implement PLL because Division and Multiplication cannot be achieved" {  } {  } 0 0 "Can't implement PLL because %1!s!" 0 0 "" 0}  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "Can't implement clock multiplication and clock division parameter values for PLL \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_YGR_PLL_PARAMETER_DIFF2" "multiplication factor altpll:altpll_component\|_clk0 multiplication of 5 multiplication of 4 " "Warning: Can't achieve requested value multiplication of 5 for clock output altpll:altpll_component\|_clk0 of parameter multiplication factor -- achieved value of multiplication of 4" {  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "Can't achieve requested value %3!s! for clock output %2!s! of parameter %1!s! -- achieved value of %4!s!" 0 0 "" 0} { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "altpll:altpll_component\|_clk0 4 1 0 0 " "Info: Implementing clock multiplication of 4, clock division of 1, and phase shift of 0 degrees (0 ps) for altpll:altpll_component\|_clk0 port" {  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "" 0} { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "altpll:altpll_component\|_clk1 1 4 0 0 " "Info: Implementing clock multiplication of 1, clock division of 4, and phase shift of 0 degrees (0 ps) for altpll:altpll_component\|_clk1 port" {  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 892 3 0 } }  } 0 0 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "" 0}  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "Can't implement PLL \"%1!s!\" as %2!s! PLL type" 0 0 "" 0}
{ "Error" "EQEXE_ERROR_COUNT" "Fitter 3 s 3 s Quartus II " "Error: Quartus II Fitter was unsuccessful. 3 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "144 " "Info: Allocated 144 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Error" "EQEXE_END_BANNER_TIME" "Mon May 04 10:14:38 2009 " "Error: Processing ended: Mon May 04 10:14:38 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Error" "EQEXE_ELAPSED_TIME" "00:00:00 " "Error: Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}