prev_cmp_sxh.map.qmsg

来自「TI公司的TLC5510的用VHDL写的控制器及其仿真」· QMSG 代码 · 共 11 行

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon May 04 10:07:42 2009 " "Info: Processing started: Mon May 04 10:07:42 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off SXH -c SXH " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off SXH -c SXH" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "SXH.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file SXH.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sxh-SYN " "Info: Found design unit 1: sxh-SYN" {  } { { "SXH.vhd" "" { Text "G:/altera/quartus/tlc5510/SXH.vhd" 55 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 SXH " "Info: Found entity 1: SXH" {  } { { "SXH.vhd" "" { Text "G:/altera/quartus/tlc5510/SXH.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "SXH " "Info: Elaborating entity \"SXH\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../libraries/megafunctions/altpll.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/altpll.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altpll " "Info: Found entity 1: altpll" {  } { { "altpll.tdf" "" { Text "g:/altera/quartus/libraries/megafunctions/altpll.tdf" 476 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll altpll:altpll_component " "Info: Elaborating entity \"altpll\" for hierarchy \"altpll:altpll_component\"" {  } { { "SXH.vhd" "altpll_component" { Text "G:/altera/quartus/tlc5510/SXH.vhd" 149 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "altpll:altpll_component " "Info: Elaborated megafunction instantiation \"altpll:altpll_component\"" {  } { { "SXH.vhd" "" { Text "G:/altera/quartus/tlc5510/SXH.vhd" 149 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "7 " "Info: Implemented 7 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "3 " "Info: Implemented 3 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Info: Implemented 1 ClockLock PLLs" {  } {  } 0 0 "Implemented %1!d! ClockLock PLLs" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "158 " "Info: Allocated 158 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon May 04 10:07:45 2009 " "Info: Processing ended: Mon May 04 10:07:45 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}