jtop.pad

来自「这是一个交织器/解交织器的FPGA实现」· PAD 代码 · 共 31 行

Release 8.1i - Fit J.30
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved

 5- 5-2009  8:54PM

NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
character is used as the data field separator.
This file is also designed to support parsing.

Input file:  jtop.ngd
output file: jtop.pad
Part type:   xa95144xl
Speed grade: -15
Package:     tq144

Pinout by Pin Number:

-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank Number|{blank}|Slew Rate|Termination|{blank}|Voltage|Constraint|


To preserve the pinout above for future design iterations in
Project Navigator simply execute the (Lock Pins) process
located under the (Implement Design) process in a toolbox named
(Optional Implementation Tools) or invoke PIN2UCF from the
command line. The location constraints will be written into your
specified UCF file