hdpdeps.ref

这是一个交织器/解交织器的FPGA实现

V3 19
FL D:/xjw/4_31/countern.vhd 2009/05/05.15:27:54 J.30
EN work/countern 1241527846 FL D:/xjw/4_31/countern.vhd PB ieee/std_logic_1164 1163575071 \
      PB ieee/std_logic_arith 1163575072
AR work/countern/rtl 1241527847 \
      FL D:/xjw/4_31/countern.vhd EN work/countern 1241527846
FL D:/xjw/4_31/jtop.vhdl 2009/05/05.20:28:45 J.30
EN work/jtop 1241527854 FL D:/xjw/4_31/jtop.vhdl PB ieee/std_logic_1164 1163575071 \
      PB ieee/std_logic_arith 1163575072
AR work/jtop/rtl 1241527855 \
      FL D:/xjw/4_31/jtop.vhdl EN work/jtop 1241527854 CP countern CP rom_16_8 \
      CP mux2 CP ram_16_8
FL D:/xjw/4_31/mux2.vhd 2009/05/03.23:27:47 J.30
EN work/mux2 1241527850 FL D:/xjw/4_31/mux2.vhd PB ieee/std_logic_1164 1163575071 \
      PB ieee/std_logic_arith 1163575072
AR work/mux2/if_march 1241527851 \
      FL D:/xjw/4_31/mux2.vhd EN work/mux2 1241527850
FL D:/xjw/4_31/ram_16_8.vhd 2009/05/03.23:37:55 J.30
EN work/ram_16_8 1241527852 FL D:/xjw/4_31/ram_16_8.vhd PB ieee/std_logic_1164 1163575071 \
      PB ieee/STD_LOGIC_UNSIGNED 1163575073
AR work/ram_16_8/rtl 1241527853 \
      FL D:/xjw/4_31/ram_16_8.vhd EN work/ram_16_8 1241527852
FL D:/xjw/4_31/rom_16_8.vhd 2009/05/03.23:38:20 J.30
EN work/rom_16_8 1241527848 FL D:/xjw/4_31/rom_16_8.vhd PB ieee/std_logic_1164 1163575071
AR work/rom_16_8/rtl 1241527849 \
      FL D:/xjw/4_31/rom_16_8.vhd EN work/rom_16_8 1241527848