hdllib.ref

这是一个交织器/解交织器的FPGA实现

EN mux2 NULL D:/xjw/4_31/mux2.vhd sub00/vhpl04 1241527850
EN jtop NULL D:/xjw/4_31/jtop.vhdl sub00/vhpl08 1241527854
AR rom_16_8 rtl D:/xjw/4_31/rom_16_8.vhd sub00/vhpl03 1241527849
EN countern NULL D:/xjw/4_31/countern.vhd sub00/vhpl00 1241527846
EN ram_16_8 NULL D:/xjw/4_31/ram_16_8.vhd sub00/vhpl06 1241527852
AR jtop rtl D:/xjw/4_31/jtop.vhdl sub00/vhpl09 1241527855
AR mux2 if_march D:/xjw/4_31/mux2.vhd sub00/vhpl05 1241527851
EN rom_16_8 NULL D:/xjw/4_31/rom_16_8.vhd sub00/vhpl02 1241527848
AR countern rtl D:/xjw/4_31/countern.vhd sub00/vhpl01 1241527847
AR ram_16_8 rtl D:/xjw/4_31/ram_16_8.vhd sub00/vhpl07 1241527853