jtop.bld

来自「这是一个交织器/解交织器的FPGA实现」· BLD 代码 · 共 37 行

Release 9.1i ngdbuild J.30
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

Command Line: D:\Xilinx91i soft\bin\nt\ngdbuild.exe -ise D:/xjw/4_31/4_31.ise
-intstyle ise -dd _ngo -i -p xa9500xl jtop.ngc jtop.ngd

Reading NGO file "D:/xjw/4_31/jtop.ngc" ...

Checking timing specifications ...
Checking Partitions ...
Checking expanded design ...
WARNING:NgdBuild:452 - logical net 'ds<7>' has no driver
WARNING:NgdBuild:452 - logical net 'ds<6>' has no driver
WARNING:NgdBuild:452 - logical net 'ds<5>' has no driver
WARNING:NgdBuild:452 - logical net 'ds<4>' has no driver
WARNING:NgdBuild:452 - logical net 'ys<7>' has no driver
WARNING:NgdBuild:452 - logical net 'ys<6>' has no driver
WARNING:NgdBuild:452 - logical net 'ys<5>' has no driver
WARNING:NgdBuild:452 - logical net 'ys<4>' has no driver

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   8

Total memory usage is 64556 kilobytes

Writing NGD file "jtop.ngd" ...

Writing NGDBUILD log file "jtop.bld"...