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📄 jtop.xml

📁 这是一个交织器/解交织器的FPGA实现
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<document><ascFile>jtop.rpt</ascFile><devFile>D:/Xilinx91i soft/xa9500xl/data/xa95144xl.chp</devFile><mfdFile>jtop.mfd</mfdFile><htmlFile logic_legend="logiclegend.htm" logo="xc9500xl_logo.jpg" pin_legend="pinlegend.htm"/><header date=" 5- 5-2009" design="jtop" device="XA95144XL" eqnType="1" pkg="TQ144" speed="-15" status="10" statusStr="Design Rule Checking Failed" swVersion="J.30" time="  8:54PM" version="1.0"/><inputs id="ena"/><inputs id="di0_SPECSIG"/><inputs id="di1_SPECSIG"/><inputs id="di2_SPECSIG"/><inputs id="di3_SPECSIG"/><inputs id="di4_SPECSIG"/><inputs id="di5_SPECSIG"/><inputs id="di6_SPECSIG"/><inputs id="di7_SPECSIG"/><pin id="FB1_MC1_PIN23" pinnum="23"/><pin id="FB1_MC2_PIN16" pinnum="16"/><pin id="FB1_MC3_PIN17" pinnum="17"/><pin id="FB1_MC4_PIN25" pinnum="25"/><pin id="FB1_MC5_PIN19" pinnum="19"/><pin id="FB1_MC6_PIN20" pinnum="20"/><pin id="FB1_MC8_PIN21" pinnum="21"/><pin id="FB1_MC9_PIN22" pinnum="22"/><pin id="FB1_MC10_PIN31" pinnum="31"/><pin id="FB1_MC11_PIN24" pinnum="24"/><pin id="FB1_MC12_PIN26" pinnum="26"/><pin id="FB1_MC14_PIN27" pinnum="27"/><pin id="FB1_MC15_PIN28" pinnum="28"/><pin id="FB1_MC16_PIN35" pinnum="35"/><pin id="FB1_MC17_PIN30" pinnum="30"/><pin id="FB2_MC1_PIN142" pinnum="142"/><pin id="FB2_MC2_PIN143" pinnum="143"/><pin id="FB2_MC4_PIN4" pinnum="4"/><pin id="FB2_MC5_PIN2" pinnum="2"/><pin id="FB2_MC6_PIN3" pinnum="3"/><pin id="FB2_MC8_PIN5" pinnum="5"/><pin id="FB2_MC9_PIN6" pinnum="6"/><pin id="FB2_MC10_PIN7" pinnum="7"/><pin id="FB2_MC11_PIN9" pinnum="9"/><pin id="FB2_MC12_PIN10" pinnum="10"/><pin id="FB2_MC13_PIN12" pinnum="12"/><pin id="FB2_MC14_PIN11" pinnum="11"/><pin id="FB2_MC15_PIN13" pinnum="13"/><pin id="FB2_MC16_PIN14" pinnum="14"/><pin id="FB2_MC17_PIN15" pinnum="15"/><pin id="FB3_MC1_PIN39" pinnum="39"/><pin id="FB3_MC2_PIN32" pinnum="32"/><pin id="FB3_MC3_PIN41" pinnum="41"/><pin id="FB3_MC4_PIN44" pinnum="44"/><pin id="FB3_MC5_PIN33" pinnum="33"/><pin id="FB3_MC6_PIN34" pinnum="34"/><pin id="FB3_MC7_PIN46" pinnum="46"/><pin id="FB3_MC8_PIN38" pinnum="38"/><pin id="FB3_MC9_PIN40" pinnum="40"/><pin id="FB3_MC10_PIN48" pinnum="48"/><pin id="FB3_MC11_PIN43" pinnum="43"/><pin id="FB3_MC12_PIN45" pinnum="45"/><pin id="FB3_MC14_PIN49" pinnum="49"/><pin id="FB3_MC15_PIN50" pinnum="50"/><pin id="FB3_MC17_PIN51" pinnum="51"/><pin id="FB4_MC1_PIN118" pinnum="118"/><pin id="FB4_MC2_PIN126" pinnum="126"/><pin id="FB4_MC3_PIN133" pinnum="133"/><pin id="FB4_MC5_PIN128" pinnum="128"/><pin id="FB4_MC6_PIN129" pinnum="129"/><pin id="FB4_MC8_PIN130" pinnum="130"/><pin id="FB4_MC9_PIN131" pinnum="131"/><pin id="FB4_MC10_PIN135" pinnum="135"/><pin id="FB4_MC11_PIN132" pinnum="132"/><pin id="FB4_MC12_PIN134" pinnum="134"/><pin id="FB4_MC13_PIN137" pinnum="137"/><pin id="FB4_MC14_PIN136" pinnum="136"/><pin id="FB4_MC15_PIN138" pinnum="138"/><pin id="FB4_MC16_PIN139" pinnum="139"/><pin id="FB4_MC17_PIN140" pinnum="140"/><pin id="FB5_MC2_PIN52" pinnum="52"/><pin id="FB5_MC3_PIN59" pinnum="59"/><pin id="FB5_MC5_PIN53" pinnum="53"/><pin id="FB5_MC6_PIN54" pinnum="54"/><pin id="FB5_MC7_PIN66" pinnum="66"/><pin id="FB5_MC8_PIN56" pinnum="56"/><pin id="FB5_MC9_PIN57" pinnum="57"/><pin id="FB5_MC10_PIN68" pinnum="68"/><pin id="FB5_MC11_PIN58" pinnum="58"/><pin id="FB5_MC12_PIN60" pinnum="60"/><pin id="FB5_MC13_PIN70" pinnum="70"/><pin id="FB5_MC14_PIN61" pinnum="61"/><pin id="FB5_MC15_PIN64" pinnum="64"/><pin id="FB5_MC17_PIN69" pinnum="69"/><pin id="FB6_MC2_PIN106" pinnum="106"/><pin id="FB6_MC4_PIN111" pinnum="111"/><pin id="FB6_MC5_PIN110" pinnum="110"/><pin id="FB6_MC6_PIN112" pinnum="112"/><pin id="FB6_MC8_PIN113" pinnum="113"/><pin id="FB6_MC9_PIN116" pinnum="116"/><pin id="FB6_MC10_PIN115" pinnum="115"/><pin id="FB6_MC11_PIN119" pinnum="119"/><pin id="FB6_MC12_PIN120" pinnum="120"/><pin id="FB6_MC14_PIN121" pinnum="121"/><pin id="FB6_MC15_PIN124" pinnum="124"/><pin id="FB6_MC16_PIN117" pinnum="117"/><pin id="FB6_MC17_PIN125" pinnum="125"/><pin id="FB7_MC2_PIN71" pinnum="71"/><pin id="FB7_MC3_PIN75" pinnum="75"/><pin id="FB7_MC5_PIN74" pinnum="74"/><pin id="FB7_MC6_PIN76" pinnum="76"/><pin id="FB7_MC7_PIN77" pinnum="77"/><pin id="FB7_MC8_PIN78" pinnum="78"/><pin id="FB7_MC9_PIN80" pinnum="80"/><pin id="FB7_MC10_PIN79" pinnum="79"/><pin id="FB7_MC11_PIN82" pinnum="82"/><pin id="FB7_MC12_PIN85" pinnum="85"/><pin id="FB7_MC13_PIN81" pinnum="81"/><pin id="FB7_MC14_PIN86" pinnum="86"/><pin id="FB7_MC15_PIN87" pinnum="87"/><pin id="FB7_MC16_PIN83" pinnum="83"/><pin id="FB7_MC17_PIN88" pinnum="88"/><pin id="FB8_MC2_PIN91" pinnum="91"/><pin id="FB8_MC3_PIN95" pinnum="95"/><pin id="FB8_MC4_PIN97" pinnum="97"/><pin id="FB8_MC5_PIN92" pinnum="92"/><pin id="FB8_MC6_PIN93" pinnum="93"/><pin id="FB8_MC8_PIN94" pinnum="94"/><pin id="FB8_MC9_PIN96" pinnum="96"/><pin id="FB8_MC10_PIN101" pinnum="101"/><pin id="FB8_MC11_PIN98" pinnum="98"/><pin id="FB8_MC12_PIN100" pinnum="100"/><pin id="FB8_MC13_PIN103" pinnum="103"/><pin id="FB8_MC14_PIN102" pinnum="102"/><pin id="FB8_MC15_PIN104" pinnum="104"/><pin id="FB8_MC16_PIN107" pinnum="107"/><pin id="FB8_MC17_PIN105" pinnum="105"/><fblock id="FB1" inputUse="0" pinUse="0"><macrocell id="FB1_MC1" pin="FB1_MC1_PIN23"/><macrocell id="FB1_MC2" pin="FB1_MC2_PIN16"/><macrocell id="FB1_MC3" pin="FB1_MC3_PIN17"/><macrocell id="FB1_MC4" pin="FB1_MC4_PIN25"/><macrocell id="FB1_MC5" pin="FB1_MC5_PIN19"/><macrocell id="FB1_MC6" pin="FB1_MC6_PIN20"/><macrocell id="FB1_MC7"/><macrocell id="FB1_MC8" pin="FB1_MC8_PIN21"/><macrocell id="FB1_MC9" pin="FB1_MC9_PIN22"/><macrocell id="FB1_MC10" pin="FB1_MC10_PIN31"/><macrocell id="FB1_MC11" pin="FB1_MC11_PIN24"/><macrocell id="FB1_MC12" pin="FB1_MC12_PIN26"/><macrocell id="FB1_MC13"/><macrocell id="FB1_MC14" pin="FB1_MC14_PIN27"/><macrocell id="FB1_MC15" pin="FB1_MC15_PIN28"/><macrocell id="FB1_MC16" pin="FB1_MC16_PIN35"/><macrocell id="FB1_MC17" pin="FB1_MC17_PIN30"/><macrocell id="FB1_MC18"/></fblock><fblock id="FB2" inputUse="0" pinUse="0"><macrocell id="FB2_MC1" pin="FB2_MC1_PIN142"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN143"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4" pin="FB2_MC4_PIN4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN2"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN3"/><macrocell id="FB2_MC7"/><macrocell id="FB2_MC8" pin="FB2_MC8_PIN5"/><macrocell id="FB2_MC9" pin="FB2_MC9_PIN6"/><macrocell id="FB2_MC10" pin="FB2_MC10_PIN7"/><macrocell id="FB2_MC11" pin="FB2_MC11_PIN9"/><macrocell id="FB2_MC12" pin="FB2_MC12_PIN10"/><macrocell id="FB2_MC13" pin="FB2_MC13_PIN12"/><macrocell id="FB2_MC14" pin="FB2_MC14_PIN11"/><macrocell id="FB2_MC15" pin="FB2_MC15_PIN13"/><macrocell id="FB2_MC16" pin="FB2_MC16_PIN14"/><macrocell id="FB2_MC17" pin="FB2_MC17_PIN15"/><macrocell id="FB2_MC18"/></fblock><fblock id="FB3" inputUse="0" pinUse="0"><macrocell id="FB3_MC1" pin="FB3_MC1_PIN39"/><macrocell id="FB3_MC2" pin="FB3_MC2_PIN32"/><macrocell id="FB3_MC3" pin="FB3_MC3_PIN41"/><macrocell id="FB3_MC4" pin="FB3_MC4_PIN44"/><macrocell id="FB3_MC5" pin="FB3_MC5_PIN33"/><macrocell id="FB3_MC6" pin="FB3_MC6_PIN34"/><macrocell id="FB3_MC7" pin="FB3_MC7_PIN46"/><macrocell id="FB3_MC8" pin="FB3_MC8_PIN38"/><macrocell id="FB3_MC9" pin="FB3_MC9_PIN40"/><macrocell id="FB3_MC10" pin="FB3_MC10_PIN48"/><macrocell id="FB3_MC11" pin="FB3_MC11_PIN43"/><macrocell id="FB3_MC12" pin="FB3_MC12_PIN45"/><macrocell id="FB3_MC13"/><macrocell id="FB3_MC14" pin="FB3_MC14_PIN49"/><macrocell id="FB3_MC15" pin="FB3_MC15_PIN50"/><macrocell id="FB3_MC16"/><macrocell id="FB3_MC17" pin="FB3_MC17_PIN51"/><macrocell id="FB3_MC18"/></fblock><fblock id="FB4" inputUse="0" pinUse="0"><macrocell id="FB4_MC1" pin="FB4_MC1_PIN118"/><macrocell id="FB4_MC2" pin="FB4_MC2_PIN126"/><macrocell id="FB4_MC3" pin="FB4_MC3_PIN133"/><macrocell id="FB4_MC4"/><macrocell id="FB4_MC5" pin="FB4_MC5_PIN128"/><macrocell id="FB4_MC6" pin="FB4_MC6_PIN129"/><macrocell id="FB4_MC7"/><macrocell id="FB4_MC8" pin="FB4_MC8_PIN130"/><macrocell id="FB4_MC9" pin="FB4_MC9_PIN131"/><macrocell id="FB4_MC10" pin="FB4_MC10_PIN135"/><macrocell id="FB4_MC11" pin="FB4_MC11_PIN132"/><macrocell id="FB4_MC12" pin="FB4_MC12_PIN134"/><macrocell id="FB4_MC13" pin="FB4_MC13_PIN137"/><macrocell id="FB4_MC14" pin="FB4_MC14_PIN136"/><macrocell id="FB4_MC15" pin="FB4_MC15_PIN138"/><macrocell id="FB4_MC16" pin="FB4_MC16_PIN139"/><macrocell id="FB4_MC17" pin="FB4_MC17_PIN140"/><macrocell id="FB4_MC18"/></fblock><fblock id="FB5" inputUse="0" pinUse="0"><macrocell id="FB5_MC1"/><macrocell id="FB5_MC2" pin="FB5_MC2_PIN52"/><macrocell id="FB5_MC3" pin="FB5_MC3_PIN59"/><macrocell id="FB5_MC4"/><macrocell id="FB5_MC5" pin="FB5_MC5_PIN53"/><macrocell id="FB5_MC6" pin="FB5_MC6_PIN54"/><macrocell id="FB5_MC7" pin="FB5_MC7_PIN66"/><macrocell id="FB5_MC8" pin="FB5_MC8_PIN56"/><macrocell id="FB5_MC9" pin="FB5_MC9_PIN57"/><macrocell id="FB5_MC10" pin="FB5_MC10_PIN68"/><macrocell id="FB5_MC11" pin="FB5_MC11_PIN58"/><macrocell id="FB5_MC12" pin="FB5_MC12_PIN60"/><macrocell id="FB5_MC13" pin="FB5_MC13_PIN70"/><macrocell id="FB5_MC14" pin="FB5_MC14_PIN61"/><macrocell id="FB5_MC15" pin="FB5_MC15_PIN64"/><macrocell id="FB5_MC16"/><macrocell id="FB5_MC17" pin="FB5_MC17_PIN69"/><macrocell id="FB5_MC18"/></fblock><fblock id="FB6" inputUse="0" pinUse="0"><macrocell id="FB6_MC1"/><macrocell id="FB6_MC2" pin="FB6_MC2_PIN106"/><macrocell id="FB6_MC3"/><macrocell id="FB6_MC4" pin="FB6_MC4_PIN111"/><macrocell id="FB6_MC5" pin="FB6_MC5_PIN110"/><macrocell id="FB6_MC6" pin="FB6_MC6_PIN112"/><macrocell id="FB6_MC7"/><macrocell id="FB6_MC8" pin="FB6_MC8_PIN113"/><macrocell id="FB6_MC9" pin="FB6_MC9_PIN116"/><macrocell id="FB6_MC10" pin="FB6_MC10_PIN115"/><macrocell id="FB6_MC11" pin="FB6_MC11_PIN119"/><macrocell id="FB6_MC12" pin="FB6_MC12_PIN120"/><macrocell id="FB6_MC13"/><macrocell id="FB6_MC14" pin="FB6_MC14_PIN121"/><macrocell id="FB6_MC15" pin="FB6_MC15_PIN124"/><macrocell id="FB6_MC16" pin="FB6_MC16_PIN117"/><macrocell id="FB6_MC17" pin="FB6_MC17_PIN125"/><macrocell id="FB6_MC18"/></fblock><fblock id="FB7" inputUse="0" pinUse="0"><macrocell id="FB7_MC1"/><macrocell id="FB7_MC2" pin="FB7_MC2_PIN71"/><macrocell id="FB7_MC3" pin="FB7_MC3_PIN75"/><macrocell id="FB7_MC4"/><macrocell id="FB7_MC5" pin="FB7_MC5_PIN74"/><macrocell id="FB7_MC6" pin="FB7_MC6_PIN76"/><macrocell id="FB7_MC7" pin="FB7_MC7_PIN77"/><macrocell id="FB7_MC8" pin="FB7_MC8_PIN78"/><macrocell id="FB7_MC9" pin="FB7_MC9_PIN80"/><macrocell id="FB7_MC10" pin="FB7_MC10_PIN79"/><macrocell id="FB7_MC11" pin="FB7_MC11_PIN82"/><macrocell id="FB7_MC12" pin="FB7_MC12_PIN85"/><macrocell id="FB7_MC13" pin="FB7_MC13_PIN81"/><macrocell id="FB7_MC14" pin="FB7_MC14_PIN86"/><macrocell id="FB7_MC15" pin="FB7_MC15_PIN87"/><macrocell id="FB7_MC16" pin="FB7_MC16_PIN83"/><macrocell id="FB7_MC17" pin="FB7_MC17_PIN88"/><macrocell id="FB7_MC18"/></fblock><fblock id="FB8" inputUse="0" pinUse="0"><macrocell id="FB8_MC1"/><macrocell id="FB8_MC2" pin="FB8_MC2_PIN91"/><macrocell id="FB8_MC3" pin="FB8_MC3_PIN95"/><macrocell id="FB8_MC4" pin="FB8_MC4_PIN97"/><macrocell id="FB8_MC5" pin="FB8_MC5_PIN92"/><macrocell id="FB8_MC6" pin="FB8_MC6_PIN93"/><macrocell id="FB8_MC7"/><macrocell id="FB8_MC8" pin="FB8_MC8_PIN94"/><macrocell id="FB8_MC9" pin="FB8_MC9_PIN96"/><macrocell id="FB8_MC10" pin="FB8_MC10_PIN101"/><macrocell id="FB8_MC11" pin="FB8_MC11_PIN98"/><macrocell id="FB8_MC12" pin="FB8_MC12_PIN100"/><macrocell id="FB8_MC13" pin="FB8_MC13_PIN103"/><macrocell id="FB8_MC14" pin="FB8_MC14_PIN102"/><macrocell id="FB8_MC15" pin="FB8_MC15_PIN104"/><macrocell id="FB8_MC16" pin="FB8_MC16_PIN107"/><macrocell id="FB8_MC17" pin="FB8_MC17_PIN105"/><macrocell id="FB8_MC18"/></fblock><unmapped_logic><pterm id="INPUTPINS_1_1"><signal id="ena"/></pterm><unmapped_eqn sigUse="1"><equation id="qs0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="VCC"/></d2><clk><fastsig signal="clk"/></clk><reset><fastsig signal="clr"/></reset><ce><eq_pterm ptindx="INPUTPINS_1_1"/></ce><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="qs0_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="ena"/></pterm><unmapped_eqn sigUse="2"><equation id="qs1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/></d2><clk><fastsig signal="clk"/></clk><reset><fastsig signal="clr"/></reset><ce><eq_pterm ptindx="INPUTPINS_1_2"/></ce><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="qs0_SPECSIG"/><signal id="qs1_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="ena"/></pterm><unmapped_eqn sigUse="3"><equation id="qs2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/></d2><clk><fastsig signal="clk"/></clk><reset><fastsig signal="clr"/></reset><ce><eq_pterm ptindx="INPUTPINS_1_2"/></ce><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="qs0_SPECSIG"/><signal id="qs1_SPECSIG"/><signal id="qs2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="ena"/></pterm><unmapped_eqn sigUse="4"><equation id="qs3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/></d2><clk><fastsig signal="clk"/></clk><reset><fastsig signal="clr"/></reset><ce><eq_pterm ptindx="INPUTPINS_1_2"/></ce><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_0_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_0_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_0_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_10_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_10_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_10_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_11_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_11_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_11_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_12_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_12_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_12_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_13_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_13_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_13_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_14_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_14_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG" negated="ON"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_14_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_5_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_6_SPECSIG"/><signal id="wr_en"/><signal id="di6_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_6_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di6_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_6_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_15_7_SPECSIG"/><signal id="wr_en"/><signal id="di7_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_15_7_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di7_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_15_7_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_0_SPECSIG"/><signal id="wr_en"/><signal id="di0_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_0_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di0_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_1_SPECSIG"/><signal id="wr_en"/><signal id="di1_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_1_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di1_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_2_SPECSIG"/><signal id="wr_en"/><signal id="di2_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_2_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di2_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_3_SPECSIG"/><signal id="wr_en"/><signal id="di3_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_3_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di3_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_4_SPECSIG"/><signal id="wr_en"/><signal id="di4_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_4_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di4_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_4_SPECSIG" regUse="T"><d2><eq_pterm ptindx="INPUTPINS_1_1"/><eq_pterm ptindx="INPUTPINS_1_2"/></d2><clk><fastsig signal="clk"/></clk><prld ptindx="GND"/></equation></unmapped_eqn><pterm id="INPUTPINS_1_1"><signal id="rmaram_1_5_SPECSIG"/><signal id="wr_en"/><signal id="di5_SPECSIG" negated="ON"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><pterm id="INPUTPINS_1_2"><signal id="rmaram_1_5_SPECSIG" negated="ON"/><signal id="wr_en"/><signal id="di5_SPECSIG"/><signal id="ys3ys&lt;3&gt;_D2_SPECSIG" negated="ON"/><signal id="ys0ys&lt;0&gt;_D2_SPECSIG"/><signal id="ys2ys&lt;2&gt;_D2_SPECSIG" negated="ON"/><signal id="ys1ys&lt;1&gt;_D2_SPECSIG" negated="ON"/></pterm><unmapped_eqn sigUse="7"><equation id="rmaram_1_5_SPECSIG" regU

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