ps2.vhd

来自「ps2 vhdl 实现键盘输入 数码管显示ascii码」· VHDL 代码 · 共 20 行

library ieee;
use ieee.std_logic_1164.all;
entity ps2 is
      port(a,clk:in std_logic;
               b:out std_logic_vector(9 downto 0));
end ps2;
architecture sample of ps2 is 
component dff
port(d,clk:in std_logic;
         q:out std_logic);
end component;
signal z:std_logic_vector(0 to 9);
begin
z(0)<=a;
g1:for i in 0 to 8 generate
 dffx:dff port map(z(i),clk,z(i+1));
end generate;
b<=z;
end sample;