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📄 gray1.fit

📁 几个VHDL实现的源程序及其代码
💻 FIT
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-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 10/24/2002 09:35:48      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "gray1"
BEGIN

    DEVICE = "EPF10K10LC84-4";

    "g0"                           : INPUT_PIN  = 60     ;
    "g1"                           : INPUT_PIN  = 59     ;
    "g2"                           : INPUT_PIN  = 58     ;
    "g3"                           : INPUT_PIN  = 54     ;
    "b0"                           : OUTPUT_PIN = 30     ;
    "b1"                           : OUTPUT_PIN = 29     ;
    "b2"                           : OUTPUT_PIN = 28     ;
    "b3"                           : OUTPUT_PIN = 27     ;
    "b3~1"                         : LOCATION   = LC1_C9 ;
    ":18"                          : LOCATION   = LC3_C9 ;
    ":45"                          : LOCATION   = LC5_C9 ;
    ":138"                         : LOCATION   = LC7_C9 ;

END;

INTERNAL_INFO "gray1"
BEGIN
	DEVICE = EPF10K10LC84-4;
    LC1_C9  : LORAX = "1:MSW0R2C8,HHL21R2->OH8R2P27|";
    OH3R2P60 : LORAX = "1:G37R2,PA1R2C8->LC7_C9|";
    OH4R2P59 : LORAX = "1:G47R2,PA3R2C8->LC5_C9,->LC7_C9|";
    OH6R2P58 : LORAX = "1:G45R2,PA5R2C8->LC3_C9,->LC5_C9,->LC7_C9|";
    OV2C20P54 : LORAX = "1:V14C20,G90R2,PA8R2C8->LC1_C9,->LC3_C9,->LC5_C9,->LC7_C9|";
    LC3_C9  : LORAX = "1:MSW2R2C9,G32R2->OH10R2P28|";
    LC5_C9  : LORAX = "1:MSW4R2C8,HHL43R2->OH12R2P29|";
    LC7_C9  : LORAX = "1:MSW6R2C9,HHL26R2->OH14R2P30|";
	LC1_C9  : LORAX2 = "X, X, X, OV2C20P54";
	LC3_C9  : LORAX2 = "X, X, OH6R2P58, OV2C20P54";
	LC5_C9  : LORAX2 = "X, OH4R2P59, OH6R2P58, OV2C20P54";
	LC7_C9  : LORAX2 = "OH3R2P60, OH4R2P59, OH6R2P58, OV2C20P54";
END;

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