gray2.fit

几个VHDL实现的源程序及其代码

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 09/03/2002 10:17:39      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "gray2"
BEGIN

    DEVICE = "EPF10K10LC84-4";

    "G0"                           : INPUT_PIN  = 60     ;
    "G1"                           : INPUT_PIN  = 59     ;
    "G2"                           : INPUT_PIN  = 58     ;
    "G3"                           : INPUT_PIN  = 54     ;
    "B0"                           : OUTPUT_PIN = 30     ;
    "B1"                           : OUTPUT_PIN = 29     ;
    "B2"                           : OUTPUT_PIN = 28     ;
    "B3"                           : OUTPUT_PIN = 27     ;
    ":391"                         : LOCATION   = LC1_C12;
    "~425~1"                       : LOCATION   = LC7_C12;
    ":439"                         : LOCATION   = LC2_C8 ;
    "~439~1"                       : LOCATION   = LC3_C12;
    "~439~2"                       : LOCATION   = LC4_C12;
    ":472"                         : LOCATION   = LC5_C12;
    "~479~1"                       : LOCATION   = LC2_C12;
    ":487"                         : LOCATION   = LC8_C12;
    ":535"                         : LOCATION   = LC6_C12;

END;

INTERNAL_INFO "gray2"
BEGIN
	DEVICE = EPF10K10LC84-4;
    OH3R2P60 : LORAX = "1:G37R2,PA1R2C11->LC6_C12|";
    OH4R2P59 : LORAX = "1:G47R2,PA3R2C11->LC7_C12,->LC3_C12,->LC4_C12,->LC5_C12,->LC2_C12,->LC6_C12|";
    OH6R2P58 : LORAX = "1:G45R2|2:PA5R2C7->LC2_C8|,2:PA5R2C11->LC7_C12,->LC3_C12,->LC4_C12,->LC5_C12,->LC2_C12,->LC6_C12||";
    OV2C20P54 : LORAX = "1:V14C20,G90R2|2:PA8R2C7->LC2_C8|,2:PA8R2C11->LC7_C12,->LC3_C12,->LC4_C12,->LC5_C12,->LC2_C12,->LC6_C12||";
    LC1_C12 : LORAX = "1:MSW0R2C11,HHL20R2->OH8R2P27|";
    LC2_C8  : LORAX = "1:MSW2R2C6,HHL3R2->OH10R2P28|";
    LC8_C12 : LORAX = "1:MSW4R2C10,HHL44R2->OH12R2P29|";
    LC6_C12 : LORAX = "1:MSW6R2C10,HHL31R2->OH14R2P30|";
	LC1_C12 : LORAX2 = "LC7_C12, LC2_C12, LC3_C12, LC4_C12";
	LC7_C12 : LORAX2 = "X, OH6R2P58, OH4R2P59, OV2C20P54";
	LC3_C12 : LORAX2 = "X, OH6R2P58, OH4R2P59, OV2C20P54";
	LC4_C12 : LORAX2 = "X, OH6R2P58, OH4R2P59, OV2C20P54";
	LC2_C8  : LORAX2 = "X, X, OH6R2P58, OV2C20P54";
	LC5_C12 : LORAX2 = "X, OH6R2P58, OH4R2P59, OV2C20P54";
	LC2_C12 : LORAX2 = "X, OH6R2P58, OH4R2P59, OV2C20P54";
	LC8_C12 : LORAX2 = "LC5_C12, LC4_C12, LC3_C12, LC2_C12";
	LC6_C12 : LORAX2 = "OH3R2P60, OH6R2P58, OH4R2P59, OV2C20P54";
END;