bijiaoqi.hif

几个VHDL实现的源程序及其代码

HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	f7485.gdf
	{
		f7485 [] []
		{
			2 [] [];
		}
	}
	7485.tdf
	{
		7485 [DEVICE_FAMILY,USE_LPM_FOR_AHDL_OPERATORS] [aglobal.inc]
		{
			1 [DEVICE_FAMILY=FLEX10K,USE_LPM_FOR_AHDL_OPERATORS=OFF] [AGBO,AEBO,ALBO,B0,A0,ALBI,AEBI,AGBI,A2,B2,A3,B3,A1,B1];
		}
	}
	bijiaoqi.gdf
	{
		bijiaoqi [] []
		{
			0 [] [];
		}
	}
}
TREE
{
	bijiaoqi::(0,0):(0): bijiaoqi.gdf
	{
		7485:1:(0,0):(1): 7485.tdf
		{
			f7485:2:(27,3):(41,sub): f7485.gdf;
		}
		7485:1:(0,0):(15): 7485.tdf
		{
			f7485:2:(27,3):(41,sub): f7485.gdf;
		}
	}
}