gate2.fit

几个VHDL实现的源程序及其代码

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 09/02/2002 20:09:00      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "gate2"
BEGIN

    DEVICE = "EPF10K10LC84-4";

    "A"                            : INPUT_PIN  = 54     ;
    "B"                            : INPUT_PIN  = 58     ;
    "C"                            : INPUT_PIN  = 59     ;
    "lamp1"                        : OUTPUT_PIN = 27     ;
    "lamp2"                        : OUTPUT_PIN = 28     ;
    "lamp3"                        : OUTPUT_PIN = 29     ;
    "lamp1~1"                      : LOCATION   = LC1_C4 ;
    ":6"                           : LOCATION   = LC3_C4 ;
    ":7"                           : LOCATION   = LC5_C4 ;

END;

INTERNAL_INFO "gate2"
BEGIN
	DEVICE = EPF10K10LC84-4;
    OV2C20P54 : LORAX = "1:V14C20,G90R2,PA8R2C3->LC1_C4,->LC3_C4,->LC5_C4|";
    OH6R2P58 : LORAX = "1:G45R2,PA5R2C3->LC3_C4,->LC5_C4|";
    OH4R2P59 : LORAX = "1:G47R2,PA3R2C3->LC5_C4|";
    LC1_C4  : LORAX = "1:MSW0R2C3,HHL19R2->OH8R2P27|";
    LC3_C4  : LORAX = "1:MSW2R2C3,G24R2->OH10R2P28|";
    LC5_C4  : LORAX = "1:MSW4R2C3,HHL38R2->OH12R2P29|";
	LC1_C4  : LORAX2 = "X, X, X, OV2C20P54";
	LC3_C4  : LORAX2 = "X, X, OH6R2P58, OV2C20P54";
	LC5_C4  : LORAX2 = "X, OH4R2P59, OH6R2P58, OV2C20P54";
END;