dff.fit

几个VHDL实现的源程序及其代码

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 10/24/2002 09:43:58      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "dff"
BEGIN

    DEVICE = "EPF10K10LC84-4";

    "CLK"                          : INPUT_PIN  = 1      ;
    "D"                            : INPUT_PIN  = 54     ;
    "NQ"                           : OUTPUT_PIN = 28     ;
    "Q"                            : OUTPUT_PIN = 27     ;
    ":1"                           : LOCATION   = LC2_C6 ;
    "~1~1"                         : LOCATION   = LC1_C6 ;

END;

INTERNAL_INFO "dff"
BEGIN
	DEVICE = EPF10K10LC84-4;
    OD4P1   : LORAX = "1:FB4->LC1_C6,->LC2_C6|";
    OV2C20P54 : LORAX = "1:V14C20,G90R2,PA8R2C5->LC1_C6,->LC2_C6|";
    LC1_C6  : LORAX = "1:MSW0R2C5,HHL20R2->OH8R2P27|";
    LC2_C6  : LORAX = "1:MSW2R2C4,HHL0R2->OH10R2P28|";
	LC1_C6  : LORAX2 = "OV2C20P54, X, X, X";
	LC2_C6  : LORAX2 = "OV2C20P54, X, X, X";
END;