📄 color.rpt
字号:
- 3 - A 23 OR2 0 3 0 1 :1373
- 8 - A 23 OR2 s ! 0 4 0 2 ~1396~1
- 2 - A 23 OR2 0 4 0 1 :1397
- 1 - A 23 OR2 s 0 4 0 1 ~1421~1
- 8 - A 13 OR2 s 0 4 0 1 ~1421~2
- 4 - A 23 OR2 0 4 0 1 :1421
- 5 - C 05 OR2 s ! 0 2 0 3 ~1435~1
- 6 - C 05 AND2 0 3 0 1 :1435
- 4 - C 05 OR2 0 4 0 2 :1448
- 7 - C 05 OR2 ! 0 4 0 2 :1486
- 4 - C 02 OR2 0 4 0 2 :1537
- 2 - C 04 OR2 0 4 0 1 :1550
- 5 - C 11 OR2 ! 0 4 0 2 :1588
- 1 - C 02 OR2 s ! 0 2 0 4 ~1591~1
- 2 - C 05 OR2 0 4 0 2 :1637
- 8 - C 05 OR2 0 4 0 1 :1652
- 7 - C 11 OR2 ! 0 4 0 2 :1690
- 6 - C 11 OR2 0 4 0 1 :1744
- 1 - C 04 OR2 ! 0 3 0 2 :1756
- 3 - C 05 OR2 s 0 4 0 2 ~1874~1
- 4 - C 11 OR2 0 2 0 1 :1874
- 8 - C 11 OR2 s ! 0 2 0 2 ~1897~1
- 3 - C 11 OR2 0 4 0 1 :1898
- 2 - C 11 OR2 0 4 0 1 :1918
- 1 - C 05 OR2 0 4 0 1 :1922
- 7 - A 15 OR2 1 3 1 0 :1964
- 1 - A 17 OR2 1 3 1 0 :1974
- 6 - A 15 OR2 1 3 1 0 :1984
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: d:\maxplus2\1502d\test12\color.rpt
color
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 8/ 96( 8%) 0/ 48( 0%) 14/ 48( 29%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
C: 4/ 96( 4%) 15/ 48( 31%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
15: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
16: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: d:\maxplus2\1502d\test12\color.rpt
color
** CLOCK SIGNALS **
Type Fan-out Name
DFF 18 cc4
DFF 8 fs2
INPUT 5 md
INPUT 4 clk
Device-Specific Information: d:\maxplus2\1502d\test12\color.rpt
color
** EQUATIONS **
clk : INPUT;
md : INPUT;
-- Node name is 'b'
-- Equation name is 'b', type is output
b = _LC7_A15;
-- Node name is ':28' = 'cc0'
-- Equation name is 'cc0', location is LC6_A16, type is buried.
cc0 = DFFE(!cc0, fs2, VCC, VCC, VCC);
-- Node name is ':27' = 'cc1'
-- Equation name is 'cc1', location is LC3_A16, type is buried.
cc1 = DFFE( _EQ001, fs2, VCC, VCC, VCC);
_EQ001 = cc0 & !cc1 & !_LC1_A16
# !cc0 & cc1 & !_LC1_A16;
-- Node name is ':26' = 'cc2'
-- Equation name is 'cc2', location is LC4_A13, type is buried.
cc2 = DFFE( _EQ002, fs2, VCC, VCC, VCC);
_EQ002 = cc2 & !_LC1_A16 & !_LC2_A16
# !cc2 & !_LC1_A16 & _LC2_A16;
-- Node name is ':25' = 'cc3'
-- Equation name is 'cc3', location is LC3_A13, type is buried.
cc3 = DFFE( _EQ003, fs2, VCC, VCC, VCC);
_EQ003 = !cc2 & cc3 & !_LC1_A16
# cc3 & !_LC1_A16 & !_LC2_A16
# cc2 & !cc3 & !_LC1_A16 & _LC2_A16;
-- Node name is ':24' = 'cc4'
-- Equation name is 'cc4', location is LC2_A13, type is buried.
cc4 = DFFE( _EQ004, fs2, VCC, VCC, VCC);
_EQ004 = cc4 & !_LC1_A16 & !_LC6_A13
# !cc3 & cc4 & !_LC1_A16
# cc3 & !cc4 & !_LC1_A16 & _LC6_A13;
-- Node name is ':22' = 'fs0'
-- Equation name is 'fs0', location is LC4_A22, type is buried.
fs0 = DFFE( _EQ005, GLOBAL( clk), VCC, VCC, VCC);
_EQ005 = !fs0 & !fs2
# !fs0 & fs1
# !fs0 & !fs3;
-- Node name is ':21' = 'fs1'
-- Equation name is 'fs1', location is LC3_A22, type is buried.
fs1 = DFFE( _EQ006, GLOBAL( clk), VCC, VCC, VCC);
_EQ006 = fs0 & !fs1
# !fs0 & fs1;
-- Node name is ':20' = 'fs2'
-- Equation name is 'fs2', location is LC1_A22, type is buried.
fs2 = DFFE( _EQ007, GLOBAL( clk), VCC, VCC, VCC);
_EQ007 = fs0 & fs1 & !fs2
# !fs0 & fs1 & fs2
# !fs0 & fs2 & !fs3
# !fs1 & fs2 & !fs3
# fs0 & !fs1 & fs2;
-- Node name is ':19' = 'fs3'
-- Equation name is 'fs3', location is LC2_A22, type is buried.
fs3 = DFFE( _EQ008, GLOBAL( clk), VCC, VCC, VCC);
_EQ008 = !fs2 & fs3
# fs0 & fs1 & fs2 & !fs3
# !fs0 & fs1 & fs3
# fs0 & !fs1 & fs3;
-- Node name is 'g'
-- Equation name is 'g', type is output
g = _LC6_A15;
-- Node name is 'hs'
-- Equation name is 'hs', type is output
hs = !_LC7_A13;
-- Node name is ':38' = 'll0'
-- Equation name is 'll0', location is LC4_A16, type is buried.
ll0 = DFFE(!ll0, !cc4, VCC, VCC, VCC);
-- Node name is ':37' = 'll1'
-- Equation name is 'll1', location is LC5_C10, type is buried.
ll1 = DFFE( _EQ009, !cc4, VCC, VCC, VCC);
_EQ009 = !_LC1_C10 & ll0 & !ll1
# !_LC1_C10 & !ll0 & ll1;
-- Node name is ':36' = 'll2'
-- Equation name is 'll2', location is LC6_C10, type is buried.
ll2 = DFFE( _EQ010, !cc4, VCC, VCC, VCC);
_EQ010 = !_LC1_C10 & !_LC3_C10 & ll2
# !_LC1_C10 & _LC3_C10 & !ll2;
-- Node name is ':35' = 'll3'
-- Equation name is 'll3', location is LC2_C10, type is buried.
ll3 = DFFE( _EQ011, !cc4, VCC, VCC, VCC);
_EQ011 = !_LC1_C10 & !ll2 & ll3
# !_LC1_C10 & !_LC3_C10 & ll3
# !_LC1_C10 & _LC3_C10 & ll2 & !ll3;
-- Node name is ':34' = 'll4'
-- Equation name is 'll4', location is LC7_C10, type is buried.
ll4 = DFFE( _EQ012, !cc4, VCC, VCC, VCC);
_EQ012 = !_LC1_C10 & !_LC4_C10 & ll4
# !_LC1_C10 & !ll3 & ll4
# !_LC1_C10 & _LC4_C10 & ll3 & !ll4;
-- Node name is ':33' = 'll5'
-- Equation name is 'll5', location is LC5_C2, type is buried.
ll5 = DFFE( _EQ013, !cc4, VCC, VCC, VCC);
_EQ013 = !_LC1_C10 & !_LC8_C10 & ll5
# !_LC1_C10 & _LC8_C10 & !ll5;
-- Node name is ':32' = 'll6'
-- Equation name is 'll6', location is LC6_C2, type is buried.
ll6 = DFFE( _EQ014, !cc4, VCC, VCC, VCC);
_EQ014 = !_LC1_C10 & !ll5 & ll6
# !_LC1_C10 & !_LC8_C10 & ll6
# !_LC1_C10 & _LC8_C10 & ll5 & !ll6;
-- Node name is ':31' = 'll7'
-- Equation name is 'll7', location is LC3_C2, type is buried.
ll7 = DFFE( _EQ015, !cc4, VCC, VCC, VCC);
_EQ015 = !_LC1_C10 & !ll6 & ll7
# !_LC1_C10 & !_LC7_C2 & ll7
# !_LC1_C10 & _LC7_C2 & ll6 & !ll7;
-- Node name is ':30' = 'll8'
-- Equation name is 'll8', location is LC2_C2, type is buried.
ll8 = DFFE( _EQ016, !cc4, VCC, VCC, VCC);
_EQ016 = !_LC1_C10 & !ll7 & ll8
# !_LC1_C10 & !_LC8_C2 & ll8
# !_LC1_C10 & _LC8_C2 & ll7 & !ll8;
-- Node name is ':9' = 'mmd0'
-- Equation name is 'mmd0', location is LC2_A15, type is buried.
mmd0 = DFFE( _EQ017, GLOBAL( md), VCC, VCC, VCC);
_EQ017 = !mmd0 & !mmd1;
-- Node name is ':8' = 'mmd1'
-- Equation name is 'mmd1', location is LC3_A15, type is buried.
mmd1 = DFFE( _EQ018, GLOBAL( md), VCC, VCC, VCC);
_EQ018 = mmd0 & !mmd1;
-- Node name is 'r'
-- Equation name is 'r', type is output
r = _LC1_A17;
-- Node name is 'vs'
-- Equation name is 'vs', type is output
vs = !_LC1_C11;
-- Node name is '|LPM_ADD_SUB:441|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_A16', type is buried
_LC2_A16 = LCELL( _EQ019);
_EQ019 = cc0 & cc1;
-- Node name is '|LPM_ADD_SUB:441|addcore:adder|:63' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_A13', type is buried
_LC6_A13 = LCELL( _EQ020);
_EQ020 = cc2 & _LC2_A16;
-- Node name is '|LPM_ADD_SUB:631|addcore:adder|:75' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_C10', type is buried
_LC3_C10 = LCELL( _EQ021);
_EQ021 = ll0 & ll1;
-- Node name is '|LPM_ADD_SUB:631|addcore:adder|:79' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_C10', type is buried
_LC4_C10 = LCELL( _EQ022);
_EQ022 = _LC3_C10 & ll2;
-- Node name is '|LPM_ADD_SUB:631|addcore:adder|:87' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C10', type is buried
_LC8_C10 = LCELL( _EQ023);
_EQ023 = _LC3_C10 & ll2 & ll3 & ll4;
-- Node name is '|LPM_ADD_SUB:631|addcore:adder|:91' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_C2', type is buried
_LC7_C2 = LCELL( _EQ024);
_EQ024 = _LC8_C10 & ll5;
-- Node name is '|LPM_ADD_SUB:631|addcore:adder|:95' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C2', type is buried
_LC8_C2 = LCELL( _EQ025);
_EQ025 = _LC8_C10 & ll5 & ll6;
-- Node name is ':233'
-- Equation name is '_LC5_A15', type is buried
_LC5_A15 = LCELL( _EQ026);
_EQ026 = !_LC3_A23 & _LC4_C11 & !mmd0 & mmd1
# _LC3_A23 & !_LC4_C11 & !mmd0
# _LC4_C11 & mmd0 & !mmd1
# _LC3_A23 & !mmd0 & !mmd1;
-- Node name is ':245'
-- Equation name is '_LC1_A15', type is buried
_LC1_A15 = LCELL( _EQ027);
_EQ027 = _LC3_C11 & mmd0 & !mmd1
# !_LC2_A23 & _LC3_C11 & !mmd0 & mmd1
# _LC2_A23 & !_LC3_C11 & !mmd0
# _LC2_A23 & !mmd0 & !mmd1;
-- Node name is ':257'
-- Equation name is '_LC4_A15', type is buried
_LC4_A15 = LCELL( _EQ028);
_EQ028 = _LC1_C5 & mmd0 & !mmd1
# _LC1_C5 & !_LC4_A23 & !mmd0 & mmd1
# !_LC1_C5 & _LC4_A23 & !mmd0
# _LC4_A23 & !mmd0 & !mmd1;
-- Node name is ':410'
-- Equation name is '_LC1_A16', type is buried
!_LC1_A16 = _LC1_A16~NOT;
_LC1_A16~NOT = LCELL( _EQ029);
_EQ029 = !cc0
# _LC1_A13
# !cc4
# cc1;
-- Node name is ':576'
-- Equation name is '_LC1_C10', type is buried
!_LC1_C10 = _LC1_C10~NOT;
_LC1_C10~NOT = LCELL( _EQ030);
_EQ030 = !_LC1_C11
# !ll0
# ll1
# !_LC1_C4;
-- Node name is ':824'
-- Equation name is '_LC7_A13', type is buried
!_LC7_A13 = _LC7_A13~NOT;
_LC7_A13~NOT = LCELL( _EQ031);
_EQ031 = !cc4
# !cc3;
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