qiangdaqi.fit

几个VHDL实现的源程序及其代码

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 09/30/2002 10:16:43      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "qiangdaqi8"
BEGIN

    DEVICE = "EPM7128SLC84-15";

    "CLK"                          : INPUT_PIN  = 83     ;
    "CTL"                          : INPUT_PIN  = 1      ;
    "k1"                           : INPUT_PIN  = 4      ; -- LC16
    "k2"                           : INPUT_PIN  = 5      ; -- LC14
    "k3"                           : INPUT_PIN  = 6      ; -- LC13
    "k4"                           : INPUT_PIN  = 8      ; -- LC11
    "K5"                           : INPUT_PIN  = 9      ; -- LC8
    "k6"                           : INPUT_PIN  = 10     ; -- LC6
    "k7"                           : INPUT_PIN  = 11     ; -- LC5
    "k8"                           : INPUT_PIN  = 12     ; -- LC3
    "DA1"                          : OUTPUT_PIN = 73     ; -- LC115
    "DA2"                          : OUTPUT_PIN = 74     ; -- LC117
    "DA3"                          : OUTPUT_PIN = 75     ; -- LC118
    "DA4"                          : OUTPUT_PIN = 76     ; -- LC120
    "DA5"                          : OUTPUT_PIN = 77     ; -- LC123
    "DA6"                          : OUTPUT_PIN = 79     ; -- LC125
    "DA7"                          : OUTPUT_PIN = 80     ; -- LC126
    "DA8"                          : OUTPUT_PIN = 81     ; -- LC128
    "sel0"                         : OUTPUT_PIN = 68     ; -- LC105
    "sel1"                         : OUTPUT_PIN = 69     ; -- LC107
    "sel2"                         : OUTPUT_PIN = 70     ; -- LC109
    "SPEAK"                        : OUTPUT_PIN = 67     ; -- LC104

END;

INTERNAL_INFO "qiangdaqi8"
BEGIN
	DEVICE = EPM7128SLC84-15;
	LC105   : LORAX = "G195R0";
	LC128   : LORAX = "G202R0,PA31R0C6,PA31R0C7";
	LC126   : LORAX = "G200R0,PA32R0C6,PA35R0C7";
	LC125   : LORAX = "G199R0,PA28R0C6,PA34R0C7";
	LC123   : LORAX = "G144R0,PA18R0C6,PA18R0C7";
	LC120   : LORAX = "G113R0,PA10R0C6,PA10R0C7";
	LC118   : LORAX = "G111R0,PA14R0C6,PA14R0C7";
	LC117   : LORAX = "G110R0,PA16R0C6,PA16R0C7";
	LC115   : LORAX = "G55R0,PA3R0C6,PA4R0C7";
	LC104   : LORAX = "G52R0";
	LC109   : LORAX = "G138R0";
	LC107   : LORAX = "G197R0";
	OH130R0P1 : LORAX = "G81R0,PA9R0C7";
	OH2R0P12 : LORAX = "G148R0,PA19R0C7";
	OH128R0P83 : LORAX = "G203R0,PA27R0C7";
	OH4R0P11 : LORAX = "G204R0,PA29R0C7";
	OH5R0P10 : LORAX = "G205R0,PA28R0C7";
	OH7R0P9 : LORAX = "G206R0,PA32R0C7";
	OH10R0P8 : LORAX = "G1R0,PA3R0C7";
	OH12R0P6 : LORAX = "G57R0,PA13R0C7";
	OH13R0P5 : LORAX = "G58R0,PA12R0C7";
	OH15R0P4 : LORAX = "G59R0,PA11R0C7";
END;