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来自「I try 4-bit comparator here in VHDL」· AWS 代码 · 共 1 行

<?xml version="1.0" encoding="UTF-8" standalone="no" ?><workspace xmlns="http://actel.com/sweng/afi"><name>smartgen</name><netlistFormat>VHDL</netlistFormat><reports><resource select="F"></resource></reports><subproject libero="T"/><hdltype>VHDL</hdltype><device die="IS4X4M1" family="ProASIC3" package="pq208"/><componentInstances/><SmartGen version="8.0"/></workspace>