receive_test.sim.rpt

串口通讯

; |receive_test|Baud8GeneratorAcc[3]~82  ; |receive_test|Baud8GeneratorAcc[3]~95   ; cout             ;
; |receive_test|Baud8GeneratorAcc[4]~81  ; |receive_test|Baud8GeneratorAcc[4]~81   ; combout          ;
; |receive_test|Baud8GeneratorAcc[4]~81  ; |receive_test|Baud8GeneratorAcc[4]~96   ; cout             ;
; |receive_test|Baud8GeneratorAcc[5]~80  ; |receive_test|Baud8GeneratorAcc[5]~80   ; combout          ;
; |receive_test|Baud8GeneratorAcc[5]~80  ; |receive_test|Baud8GeneratorAcc[5]~97   ; cout             ;
; |receive_test|Baud8GeneratorAcc[6]~79  ; |receive_test|Baud8GeneratorAcc[6]~79   ; combout          ;
; |receive_test|Baud8GeneratorAcc[6]~79  ; |receive_test|Baud8GeneratorAcc[6]~98   ; cout             ;
; |receive_test|Baud8GeneratorAcc[7]~78  ; |receive_test|Baud8GeneratorAcc[7]~78   ; combout          ;
; |receive_test|Baud8GeneratorAcc[7]~78  ; |receive_test|Baud8GeneratorAcc[7]~99   ; cout             ;
; |receive_test|Baud8GeneratorAcc[8]~77  ; |receive_test|Baud8GeneratorAcc[8]~77   ; combout          ;
; |receive_test|Baud8GeneratorAcc[8]~77  ; |receive_test|Baud8GeneratorAcc[8]~100  ; cout             ;
; |receive_test|Baud8GeneratorAcc[9]~76  ; |receive_test|Baud8GeneratorAcc[9]~76   ; combout          ;
; |receive_test|Baud8GeneratorAcc[9]~76  ; |receive_test|Baud8GeneratorAcc[9]~101  ; cout             ;
; |receive_test|Baud8GeneratorAcc[10]~75 ; |receive_test|Baud8GeneratorAcc[10]~75  ; combout          ;
; |receive_test|Baud8GeneratorAcc[10]~75 ; |receive_test|Baud8GeneratorAcc[10]~102 ; cout             ;
; |receive_test|Baud8GeneratorAcc[11]~74 ; |receive_test|Baud8GeneratorAcc[11]~74  ; combout          ;
; |receive_test|Baud8GeneratorAcc[11]~74 ; |receive_test|Baud8GeneratorAcc[11]~103 ; cout             ;
; |receive_test|Baud8GeneratorAcc[12]~73 ; |receive_test|Baud8GeneratorAcc[12]~73  ; combout          ;
; |receive_test|Baud8GeneratorAcc[12]~73 ; |receive_test|Baud8GeneratorAcc[12]~104 ; cout             ;
; |receive_test|Baud8GeneratorAcc[13]~72 ; |receive_test|Baud8GeneratorAcc[13]~72  ; combout          ;
; |receive_test|Baud8GeneratorAcc[13]~72 ; |receive_test|Baud8GeneratorAcc[13]~105 ; cout             ;
; |receive_test|Baud8GeneratorAcc[14]~71 ; |receive_test|Baud8GeneratorAcc[14]~71  ; combout          ;
; |receive_test|Baud8GeneratorAcc[14]~71 ; |receive_test|Baud8GeneratorAcc[14]~106 ; cout             ;
; |receive_test|Baud8GeneratorAcc[15]~70 ; |receive_test|Baud8GeneratorAcc[15]~70  ; combout          ;
; |receive_test|Baud8GeneratorAcc[15]~70 ; |receive_test|Baud8GeneratorAcc[15]~107 ; cout             ;
; |receive_test|Baud8GeneratorAcc[16]~69 ; |receive_test|Baud8GeneratorAcc[16]~69  ; combout          ;
; |receive_test|RxD_data_ready~reg0      ; |receive_test|RxD_data_ready~reg0       ; regout           ;
; |receive_test|RxD_data[0]~reg0         ; |receive_test|RxD_data[0]~reg0          ; regout           ;
; |receive_test|RxD_data[1]~reg0         ; |receive_test|RxD_data[1]~reg0          ; regout           ;
; |receive_test|RxD_data[2]~reg0         ; |receive_test|RxD_data[2]~reg0          ; regout           ;
; |receive_test|RxD_data[3]~reg0         ; |receive_test|RxD_data[3]~reg0          ; regout           ;
; |receive_test|RxD_data[4]~reg0         ; |receive_test|RxD_data[4]~reg0          ; regout           ;
; |receive_test|RxD_data[5]~reg0         ; |receive_test|RxD_data[5]~reg0          ; regout           ;
; |receive_test|RxD_data[6]~reg0         ; |receive_test|RxD_data[6]~reg0          ; regout           ;
; |receive_test|RxD_data[7]~reg0         ; |receive_test|RxD_data[7]~reg0          ; regout           ;
; |receive_test|RxD_endofpacket~reg0     ; |receive_test|RxD_endofpacket~reg0      ; regout           ;
; |receive_test|out_clk~reg0             ; |receive_test|out_clk~reg0              ; regout           ;
; |receive_test|bit_spacing[3]           ; |receive_test|bit_spacing[3]            ; regout           ;
; |receive_test|bit_spacing[1]           ; |receive_test|bit_spacing[1]            ; regout           ;
; |receive_test|bit_spacing[2]           ; |receive_test|bit_spacing[2]            ; regout           ;
; |receive_test|bit_spacing[0]           ; |receive_test|bit_spacing[0]            ; regout           ;
; |receive_test|Equal2~47                ; |receive_test|Equal2~47                 ; combout          ;
; |receive_test|state[0]                 ; |receive_test|state[0]                  ; regout           ;
; |receive_test|state[3]                 ; |receive_test|state[3]                  ; regout           ;
; |receive_test|state[2]                 ; |receive_test|state[2]                  ; regout           ;
; |receive_test|state[1]                 ; |receive_test|state[1]                  ; regout           ;
; |receive_test|out_clk~115              ; |receive_test|out_clk~115               ; combout          ;
; |receive_test|RxD_bit_inv              ; |receive_test|RxD_bit_inv               ; regout           ;
; |receive_test|RxD_data_ready~32        ; |receive_test|RxD_data_ready~32         ; combout          ;
; |receive_test|always5~12               ; |receive_test|always5~12                ; combout          ;
; |receive_test|always7~9                ; |receive_test|always7~9                 ; combout          ;
; |receive_test|RxD_endofpacket~31       ; |receive_test|RxD_endofpacket~31        ; combout          ;
; |receive_test|RxD_endofpacket~0        ; |receive_test|RxD_endofpacket~0         ; combout          ;
; |receive_test|Equal4~89                ; |receive_test|Equal4~89                 ; combout          ;
; |receive_test|out_clk~116              ; |receive_test|out_clk~116               ; combout          ;
; |receive_test|bit_spacing~180          ; |receive_test|bit_spacing~180           ; combout          ;
; |receive_test|bit_spacing~181          ; |receive_test|bit_spacing~181           ; combout          ;
; |receive_test|bit_spacing~182          ; |receive_test|bit_spacing~182           ; combout          ;
; |receive_test|bit_spacing[2]~183       ; |receive_test|bit_spacing[2]~183        ; combout          ;
; |receive_test|bit_spacing~184          ; |receive_test|bit_spacing~184           ; combout          ;
; |receive_test|bit_spacing~185          ; |receive_test|bit_spacing~185           ; combout          ;
; |receive_test|Baud8GeneratorAcc[0]     ; |receive_test|Baud8GeneratorAcc[0]      ; regout           ;
; |receive_test|Mux3~214                 ; |receive_test|Mux3~214                  ; combout          ;
; |receive_test|Mux3~215                 ; |receive_test|Mux3~215                  ; combout          ;
; |receive_test|Mux0~151                 ; |receive_test|Mux0~151                  ; combout          ;
; |receive_test|Mux0~152                 ; |receive_test|Mux0~152                  ; combout          ;
; |receive_test|Mux0~153                 ; |receive_test|Mux0~153                  ; combout          ;
; |receive_test|Mux1~99                  ; |receive_test|Mux1~99                   ; combout          ;
; |receive_test|Mux2~163                 ; |receive_test|Mux2~163                  ; combout          ;
; |receive_test|RxD_cnt_inv[1]           ; |receive_test|RxD_cnt_inv[1]            ; regout           ;
; |receive_test|RxD_cnt_inv[0]           ; |receive_test|RxD_cnt_inv[0]            ; regout           ;
; |receive_test|RxD_bit_inv~66           ; |receive_test|RxD_bit_inv~66            ; combout          ;
; |receive_test|RxD_sync_inv[1]          ; |receive_test|RxD_sync_inv[1]           ; regout           ;
; |receive_test|RxD_cnt_inv[1]~323       ; |receive_test|RxD_cnt_inv[1]~323        ; combout          ;
; |receive_test|RxD_cnt_inv[0]~324       ; |receive_test|RxD_cnt_inv[0]~324        ; combout          ;
; |receive_test|RxD_sync_inv[0]          ; |receive_test|RxD_sync_inv[0]           ; regout           ;
; |receive_test|RxD_data[7]~200          ; |receive_test|RxD_data[7]~200           ; combout          ;
; |receive_test|Baud8GeneratorAcc[0]~109 ; |receive_test|Baud8GeneratorAcc[0]~109  ; combout          ;
; |receive_test|RxD_sync_inv[0]~166      ; |receive_test|RxD_sync_inv[0]~166       ; combout          ;
; |receive_test|RxD_data_ready           ; |receive_test|RxD_data_ready            ; padio            ;
; |receive_test|RxD_data[0]              ; |receive_test|RxD_data[0]               ; padio            ;
; |receive_test|RxD_data[1]              ; |receive_test|RxD_data[1]               ; padio            ;
; |receive_test|RxD_data[2]              ; |receive_test|RxD_data[2]               ; padio            ;
; |receive_test|RxD_data[3]              ; |receive_test|RxD_data[3]               ; padio            ;
; |receive_test|RxD_data[4]              ; |receive_test|RxD_data[4]               ; padio            ;
; |receive_test|RxD_data[5]              ; |receive_test|RxD_data[5]               ; padio            ;
; |receive_test|RxD_data[6]              ; |receive_test|RxD_data[6]               ; padio            ;
; |receive_test|RxD_data[7]              ; |receive_test|RxD_data[7]               ; padio            ;
; |receive_test|RxD_endofpacket          ; |receive_test|RxD_endofpacket           ; padio            ;
; |receive_test|RxD_idle                 ; |receive_test|RxD_idle                  ; padio            ;
; |receive_test|out_clk                  ; |receive_test|out_clk                   ; padio            ;
; |receive_test|clk                      ; |receive_test|clk                       ; combout          ;
; |receive_test|RxD                      ; |receive_test|RxD                       ; combout          ;
; |receive_test|clk~clkctrl              ; |receive_test|clk~clkctrl               ; outclk           ;
; |receive_test|RxD_data[0]~reg0feeder   ; |receive_test|RxD_data[0]~reg0feeder    ; combout          ;
; |receive_test|RxD_data[1]~reg0feeder   ; |receive_test|RxD_data[1]~reg0feeder    ; combout          ;
; |receive_test|RxD_data[2]~reg0feeder   ; |receive_test|RxD_data[2]~reg0feeder    ; combout          ;
; |receive_test|RxD_data[3]~reg0feeder   ; |receive_test|RxD_data[3]~reg0feeder    ; combout          ;
; |receive_test|RxD_data[4]~reg0feeder   ; |receive_test|RxD_data[4]~reg0feeder    ; combout          ;
; |receive_test|RxD_data[5]~reg0feeder   ; |receive_test|RxD_data[5]~reg0feeder    ; combout          ;
; |receive_test|RxD_sync_inv[1]~feeder   ; |receive_test|RxD_sync_inv[1]~feeder    ; combout          ;
+----------------------------------------+-----------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+-------------------------------------------------+
; Missing 1-Value Coverage                        ;
+-----------+------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-----------+------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+-------------------------------------------------+
; Missing 0-Value Coverage                        ;
+-----------+------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-----------+------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Thu Nov 15 10:31:16 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off receive_test -c receive_test
Info: Using vector source file "C:/Documents and Settings/Administrator/My Documents/uart/altera_uart/receive/receive_test.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is     100.00 %
Info: Number of transitions in simulation is 110332
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Allocated 90 megabytes of memory during processing
    Info: Processing ended: Thu Nov 15 10:31:17 2007
    Info: Elapsed time: 00:00:01