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📄 songer.rpt

📁 本文介绍了乐曲演奏电路的设计与实现中涉及的CPLD/FPGA可编程逻辑控件,开发环境MAX+PLUSⅡ,硬件描述语言HDL以及介绍了在MAX+PLUSⅡ的EDA 软件平台上, 一种基于FPGA 的乐曲
💻 RPT
📖 第 1 页 / 共 5 页
字号:
   -      7     -    C    05        OR2    s   !       0    2    0    2  |tonetaba:U2|~1357~1
   -      1     -    C    22        OR2    s   !       0    2    0    2  |tonetaba:U2|~1375~1
   -      4     -    C    03        OR2                0    4    0    1  |tonetaba:U2|:1375
   -      3     -    C    03        OR2                0    3    0    1  |tonetaba:U2|:1381
   -      2     -    C    03        OR2                0    4    0    1  |tonetaba:U2|:1388
   -      5     -    C    03        OR2                0    4    1    1  |tonetaba:U2|:1397
   -      1     -    E    49        OR2                0    3    1    0  |tonetaba:U2|:1439
   -      2     -    E    14        OR2    s   !       0    2    0    4  |tonetaba:U2|~1441~1


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register


Device-Specific Information:                      e:\202050603\sy10\songer.rpt
songer

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
B:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
C:      14/208(  6%)    25/104( 24%)     0/104(  0%)    0/16(  0%)      3/16( 18%)     0/16(  0%)
D:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
E:       4/208(  1%)    22/104( 21%)     1/104(  0%)    0/16(  0%)      1/16(  6%)     0/16(  0%)
F:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
G:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
H:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
I:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
J:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
K:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
L:       0/208(  0%)     0/104(  0%)     0/104(  0%)    0/16(  0%)      0/16(  0%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
02:      3/24( 12%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
03:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
04:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
05:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
06:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
07:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
12:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
13:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
14:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
15:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
16:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
17:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
18:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
19:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
20:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
21:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
22:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
23:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
25:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
26:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
27:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
28:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
29:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
30:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
31:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
32:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
33:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
34:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
35:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
36:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
37:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
38:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
39:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
40:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
41:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
42:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
43:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
44:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
45:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
46:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
47:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
48:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
49:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
50:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
51:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
52:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                      e:\202050603\sy10\songer.rpt
songer

** CLOCK SIGNALS **

Type     Fan-out       Name
LCELL       16         |speakera:U3|:27
INPUT       12         Clk8hz
INPUT        4         clk12mhz
DFF          2         |speakera:U3|fullspks


Device-Specific Information:                      e:\202050603\sy10\songer.rpt
songer

** CLEAR SIGNALS **

Type     Fan-out       Name
LCELL       16         |speakera:U3|:27
LCELL        8         |notetabs:U1|:47


Device-Specific Information:                      e:\202050603\sy10\songer.rpt
songer

** EQUATIONS **

Clk8hz   : INPUT;
clk12mhz : INPUT;

-- Node name is 'Code10' 
-- Equation name is 'Code10', type is output 
Code10   =  _LC5_C3;

-- Node name is 'Code11' 
-- Equation name is 'Code11', type is output 
Code11   =  _LC8_C5;

-- Node name is 'Code12' 
-- Equation name is 'Code12', type is output 
Code12   =  _LC1_C4;

-- Node name is 'Code13' 
-- Equation name is 'Code13', type is output 
Code13   =  _LC3_E49;

-- Node name is 'High1' 
-- Equation name is 'High1', type is output 
High1    =  _LC1_E49;

-- Node name is 'spkout' 
-- Equation name is 'spkout', type is output 
spkout   =  _LC1_E35;

-- Node name is '|notetabs:U1|:13' = '|notetabs:U1|counter0' 
-- Equation name is '_LC2_C7', type is buried 
_LC2_C7  = DFFE(!_LC2_C7, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);

-- Node name is '|notetabs:U1|:12' = '|notetabs:U1|counter1' 
-- Equation name is '_LC2_C13', type is buried 
_LC2_C13 = DFFE( _EQ001, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ001 =  _LC2_C7 & !_LC2_C13
         # !_LC2_C7 &  _LC2_C13;

-- Node name is '|notetabs:U1|:11' = '|notetabs:U1|counter2' 
-- Equation name is '_LC4_C19', type is buried 
_LC4_C19 = DFFE( _EQ002, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ002 = !_LC2_C7 &  _LC4_C19
         # !_LC2_C13 &  _LC4_C19
         #  _LC2_C7 &  _LC2_C13 & !_LC4_C19;

-- Node name is '|notetabs:U1|:10' = '|notetabs:U1|counter3' 
-- Equation name is '_LC3_C23', type is buried 
_LC3_C23 = DFFE( _EQ003, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ003 =  _LC3_C23 & !_LC4_C19
         # !_LC2_C7 &  _LC3_C23
         # !_LC2_C13 &  _LC3_C23
         #  _LC2_C7 &  _LC2_C13 & !_LC3_C23 &  _LC4_C19;

-- Node name is '|notetabs:U1|:9' = '|notetabs:U1|counter4' 
-- Equation name is '_LC1_C17', type is buried 
_LC1_C17 = DFFE( _EQ004, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ004 =  _LC1_C17 & !_LC3_C23
         #  _LC1_C17 & !_LC6_C17
         # !_LC1_C17 &  _LC3_C23 &  _LC6_C17;

-- Node name is '|notetabs:U1|:8' = '|notetabs:U1|counter5' 
-- Equation name is '_LC3_C17', type is buried 
_LC3_C17 = DFFE( _EQ005, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ005 = !_LC1_C17 &  _LC3_C17
         #  _LC3_C17 & !_LC3_C23
         #  _LC3_C17 & !_LC6_C17
         #  _LC1_C17 & !_LC3_C17 &  _LC3_C23 &  _LC6_C17;

-- Node name is '|notetabs:U1|:7' = '|notetabs:U1|counter6' 
-- Equation name is '_LC2_C17', type is buried 
_LC2_C17 = DFFE( _EQ006, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ006 =  _LC2_C17 & !_LC3_C17
         #  _LC2_C17 & !_LC4_C17
         # !_LC2_C17 &  _LC3_C17 &  _LC4_C17;

-- Node name is '|notetabs:U1|:6' = '|notetabs:U1|counter7' 
-- Equation name is '_LC5_C17', type is buried 
_LC5_C17 = DFFE( _EQ007, GLOBAL( Clk8hz), !_LC1_C20,  VCC,  VCC);
  _EQ007 = !_LC2_C17 &  _LC5_C17
         # !_LC3_C17 &  _LC5_C17
         # !_LC4_C17 &  _LC5_C17
         #  _LC2_C17 &  _LC3_C17 &  _LC4_C17 & !_LC5_C17;

-- Node name is '|notetabs:U1|LPM_ADD_SUB:96|addcore:adder|:125' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_C17', type is buried 
_LC6_C17 = LCELL( _EQ008);
  _EQ008 =  _LC2_C7 &  _LC2_C13 &  _LC4_C19;

-- Node name is '|notetabs:U1|LPM_ADD_SUB:96|addcore:adder|:133' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_C17', type is buried 
_LC4_C17 = LCELL( _EQ009);
  _EQ009 =  _LC1_C17 &  _LC3_C23 &  _LC6_C17;

-- Node name is '|notetabs:U1|~47~1' 
-- Equation name is '_LC3_C20', type is buried 
-- synthesized logic cell 
_LC3_C20 = LCELL( _EQ010);
  _EQ010 = !_LC2_C13
         #  _LC4_C19
         # !_LC3_C23;

-- Node name is '|notetabs:U1|~47~2' 
-- Equation name is '_LC2_C20', type is buried 
-- synthesized logic cell 
_LC2_C20 = LCELL( _EQ011);
  _EQ011 =  _LC3_C17
         #  _LC2_C17
         # !_LC5_C17;

-- Node name is '|notetabs:U1|:47' 
-- Equation name is '_LC1_C20', type is buried 
!_LC1_C20 = _LC1_C20~NOT;
_LC1_C20~NOT = LCELL( _EQ012);
  _EQ012 =  _LC2_C7
         #  _LC3_C20
         #  _LC1_C17
         #  _LC2_C20;

-- Node name is '|speakera:U3|:252' = '|speakera:U3|c2' 
-- Equation name is '_LC2_E35', type is buried 
_LC2_E35 = DFFE(!_LC2_E35,  _LC2_E19,  VCC,  VCC,  VCC);

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