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📄 final.rpt

📁 此程序能够实现4位二进制乘法
💻 RPT
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字号:
        | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | |   that feed LAB 'B'
LC      | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'B':
LC32 -> * - * - - - - - - - - - - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|ps3
LC21 -> - - - - - - - - * - - - - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~333~1
LC23 -> - - - - - - - * - - - - - - - | - * - - * - - - | <-- |mult5x5:1|MULT4X4:2|~336~1
LC31 -> * * * - - - - - - - - - * - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~442~1
LC29 -> - - - - - - - - - - - * - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~445~1

Pin
83   -> - - - - - - - - - - - - - - - | * - - - - - - - | <-- DATA0
84   -> - - - - - - - - - - - - - - - | * - * - - - - - | <-- DATA1
1    -> - - - - - - - - - - - - - - - | - - * - - - - * | <-- DATA2
LC68 -> * - * - - - - - - - - - - - - | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node2
LC79 -> * * * - - - - - - - - - - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node3
LC10 -> - - - - - * - - - - - - - - - | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|~251~1
LC41 -> - - - - - - * - - - - - - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~318~1
LC38 -> - - - - - - - - - - * - - - - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~427~1
LC64 -> - - - - - - - - - - - - - * - | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~569~1
LC52 -> - - - - - - - - - - - - - - * | - * - - - - - - | <-- |mult5x5:1|MULT4X4:2|~578~1
LC9  -> - - - * - - - - - - - - - * * | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~119~1
LC33 -> * * * - - - - - - - * * * - - | - * * * * - - - | <-- |mult5x5:1|PUTIN:1|~128~1
LC34 -> - - - - - - * * * * - - - - - | - * * - - - - - | <-- |mult5x5:1|PUTIN:1|~137~1
LC7  -> - - - - * * - - - - - - - - - | * * - - - - - - | <-- |mult5x5:1|PUTIN:1|~146~1
LC3  -> - - - * - - * - - - * - - - - | * * * * - - - - | <-- |mult5x5:1|PUTIN:1|~164~1
LC46 -> - - - - * - - * - - - * - * - | - * * * - - - - | <-- |mult5x5:1|PUTIN:1|~182~1
LC2  -> * - * - - * - - - * - - - - * | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~191~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 d:\ajun\final.rpt
final

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                                         Logic cells placed in LAB 'C'
        +------------------------------- LC37 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node4
        | +----------------------------- LC43 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|g2cp1
        | | +--------------------------- LC36 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|ps5
        | | | +------------------------- LC35 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node4
        | | | | +----------------------- LC42 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node5
        | | | | | +--------------------- LC45 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node6
        | | | | | | +------------------- LC47 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|datab_node4
        | | | | | | | +----------------- LC41 |mult5x5:1|MULT4X4:2|~318~1
        | | | | | | | | +--------------- LC48 |mult5x5:1|MULT4X4:2|~327~1
        | | | | | | | | | +------------- LC38 |mult5x5:1|MULT4X4:2|~427~1
        | | | | | | | | | | +----------- LC40 |mult5x5:1|MULT4X4:2|~433~1
        | | | | | | | | | | | +--------- LC39 |mult5x5:1|MULT4X4:2|~436~1
        | | | | | | | | | | | | +------- LC33 |mult5x5:1|PUTIN:1|~128~1
        | | | | | | | | | | | | | +----- LC34 |mult5x5:1|PUTIN:1|~137~1
        | | | | | | | | | | | | | | +--- LC44 |mult5x5:1|PUTIN:1|~173~1
        | | | | | | | | | | | | | | | +- LC46 |mult5x5:1|PUTIN:1|~182~1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'C'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'C':
LC37 -> - * - * * * - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node4
LC43 -> - - - - - * - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|g2cp1
LC36 -> - * - - * * - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|ps5
LC47 -> - - - * * * - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|datab_node4
LC40 -> - - - * - - - - - - - * - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|~433~1
LC39 -> - - - - - - - - - - * - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|~436~1
LC33 -> - * * * * - * - - * * * * - - - | - * * * * - - - | <-- |mult5x5:1|PUTIN:1|~128~1
LC34 -> * * * - * - - * * - - - - * - - | - * * - - - - - | <-- |mult5x5:1|PUTIN:1|~137~1
LC44 -> - * - - * - * - * - * - - - * - | * - * * - - - - | <-- |mult5x5:1|PUTIN:1|~173~1
LC46 -> - - - - - - - - - - - - - - - * | - * * * - - - - | <-- |mult5x5:1|PUTIN:1|~182~1

Pin
33   -> - - - - - - - - - - - - * * * * | * - * - - - - - | <-- CP0
34   -> - - - - - - - - - - - - * * - - | * - * - - - - - | <-- CP1
83   -> - - - - - - - - - - - - - - - - | * - - - - - - - | <-- DATA0
84   -> - - - - - - - - - - - - - * - * | * - * - - - - - | <-- DATA1
1    -> - - - - - - - - - - - - * - * - | - - * - - - - * | <-- DATA2
LC77 -> * * * - * - - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|g4
LC17 -> - - - * * * - - - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|g4
LC30 -> - - - - * - - * - - - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|~312~1
LC28 -> - - * - - - - - - * - - - - - - | - - * - - - - - | <-- |mult5x5:1|MULT4X4:2|~421~1
LC3  -> * * * - * - - - - - - - - - - - | * * * * - - - - | <-- |mult5x5:1|PUTIN:1|~164~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 d:\ajun\final.rpt
final

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                                         Logic cells placed in LAB 'D'
        +------------------------------- LC62 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node2
        | +----------------------------- LC55 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|g2cp2
        | | +--------------------------- LC61 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps3
        | | | +------------------------- LC60 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps4
        | | | | +----------------------- LC56 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps5
        | | | | | +--------------------- LC63 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node2
        | | | | | | +------------------- LC50 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node4
        | | | | | | | +----------------- LC54 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node5
        | | | | | | | | +--------------- LC58 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node6
        | | | | | | | | | +------------- LC53 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node7
        | | | | | | | | | | +----------- LC57 |mult5x5:1|MULT4X4:2|~454~1
        | | | | | | | | | | | +--------- LC59 |mult5x5:1|MULT4X4:2|~560~1
        | | | | | | | | | | | | +------- LC64 |mult5x5:1|MULT4X4:2|~569~1
        | | | | | | | | | | | | | +----- LC52 |mult5x5:1|MULT4X4:2|~578~1
        | | | | | | | | | | | | | | +--- LC51 Y05
        | | | | | | | | | | | | | | | +- LC49 Y06
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'D':
LC62 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node2
LC55 -> - - - - - - - - - * - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|g2cp2
LC61 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps3
LC60 -> - - - - - - * * * * - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps4
LC56 -> - * - - - - - * * * - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps5
LC63 -> - - - - - - - - - - - - - - - * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node2

Pin
83   -> - - - - - - - - - - - - - - - - | * - - - - - - - | <-- DATA0
84   -> - - - - - - - - - - - - - - - - | * - * - - - - - | <-- DATA1
1    -> - - - - - - - - - - - - - - - - | - - * - - - - * | <-- DATA2
LC70 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node1
LC68 -> * - - - - * - - - - - - - - * * | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node2
LC19 -> - - * - - - * * * * - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node3
LC35 -> - * - * - - * * * - - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node4
LC42 -> - * - - * - - * * - - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node5
LC45 -> - * - - - - - - * * - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node6
LC76 -> * - - - - * - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|datab_node2
LC74 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node1
LC78 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node3
LC20 -> - * - - - - - - * * - - - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|datab_node6
LC25 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~242~1
LC10 -> - - - - - - - - - - - - - - * * | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|~251~1
LC26 -> - - - - - - - - - - - - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~345~1
LC71 -> * - - - - * - - - - * - - - * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~451~1
LC12 -> - - - - - - - - * - - - - - - - | * - - * - - - - | <-- |mult5x5:1|MULT4X4:2|~545~1
LC15 -> - - - - * - - * - - - * - - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|~557~1
LC18 -> - - - * - - * - - - - - * - - - | - - - * - - - - | <-- |mult5x5:1|MULT4X4:2|~566~1
LC27 -> - - * - - - * - - - - - - * * * | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~575~1
LC9  -> - * * * * - * * * * - * * * * * | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~119~1
LC33 -> * - - - - * - - - - * - - - * * | - * * * * - - - | <-- |mult5x5:1|PUTIN:1|~128~1
LC3  -> - * - - - - - - - - - - - - - - | * * * * - - - - | <-- |mult5x5:1|PUTIN:1|~164~1
LC44 -> - * - - - - - - * - - - - - - - | * - * * - - - - | <-- |mult5x5:1|PUTIN:1|~173~1
LC46 -> - * - - - - - * * - - - - - - - | - * * * - - - - | <-- |mult5x5:1|PUTIN:1|~182~1
LC2  -> - - - - - - - * * * - - - - - - | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~191~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 d:\ajun\final.rpt
final

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                                         Logic cells placed in LAB 'E'
        +------------------------------- LC66 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|gc2~1
        | +----------------------------- LC77 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|g4
        | | +--------------------------- LC70 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node1
        | | | +------------------------- LC68 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node2
        | | | | +----------------------- LC79 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node3
        | | | | | +--------------------- LC76 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|datab_node2
        | | | | | | +------------------- LC74 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node1
        | | | | | | | +----------------- LC78 |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node3
        | | | | | | | | +--------------- LC71 |mult5x5:1|MULT4X4:2|~451~1
        | | | | | | | | | +------------- LC73 Y00
        | | | | | | | | | | +----------- LC69 Y01
        | | | | | | | | | | | +--------- LC72 Y02
        | | | | | | | | | | | | +------- LC67 Y03
        | | | | | | | | | | | | | +----- LC65 Y04
        | | | | | | | | | | | | | | +--- LC75 Y15
        | | | | | | | | | | | | | | | +- LC80 Y16
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'E':
LC66 -> - * - - * - - - - - - - - - - - | - - - - * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|gc2~1
LC70 -> - - - - - - - - - * * - * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node1
LC68 -> - - - - - - - - - * * - * - - - | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:617|addcore:adder|addcore:adder0|result_node2
LC76 -> - - - - - - - - - * * - * - - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|datab_node2
LC74 -> - - - - - - - - - * * * * - - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node1
LC78 -> - - - - - - - - - * * * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node3
LC71 -> - - - - - - - - - * * - * - - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~451~1

Pin
83   -> - - - - - - - - - - - - - - - - | * - - - - - - - | <-- DATA0
84   -> - - - - - - - - - - - - - - - - | * - * - - - - - | <-- DATA1
1    -> - - - - - - - - - - - - - - - - | - - * - - - - * | <-- DATA2
LC62 -> - - - - - - - - - * - * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node2
LC19 -> - - - - - - - * - * * * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:624|addcore:adder|addcore:adder0|result_node3
LC61 -> - - - - - - - * - * * * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|ps3
LC63 -> - - - - - - - - - - - - * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node2
LC50 -> - - - - - - - - - - - - - - * * | - - - - * * - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node4
LC54 -> - - - - - - - - - - - - - - * * | - - - - * * - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node5
LC58 -> - - - - - - - - - - - - - - * * | - - - - * * - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node6
LC53 -> - - - - - - - - - - - - - - * * | - - - - * * - - | <-- |mult5x5:1|MULT4X4:2|LPM_ADD_SUB:632|addcore:adder|result_node7
LC8  -> - * - - * - - - - - - - - - - - | - - - - * - - - | <-- |mult5x5:1|MULT4X4:2|~224~1
LC6  -> * * - * - - - - - - - - - - - - | - - - - * - - - | <-- |mult5x5:1|MULT4X4:2|~233~1
LC25 -> * * * * - - * - - * - * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~242~1
LC10 -> - - - - - - - - - * * * * * - - | - * - * * - - - | <-- |mult5x5:1|MULT4X4:2|~251~1
LC48 -> - * - - * - - - - - - - - - - - | - - - - * - - - | <-- |mult5x5:1|MULT4X4:2|~327~1
LC23 -> * * - * - - - - - - - - - - - - | - * - - * - - - | <-- |mult5x5:1|MULT4X4:2|~336~1
LC26 -> * * * * - - * - - * - * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~345~1
LC57 -> - - - - - - - - * - - - - - - - | - - - - * - - - | <-- |mult5x5:1|MULT4X4:2|~454~1
LC27 -> - - - - - - - * - * * * * * - - | - - - * * - - - | <-- |mult5x5:1|MULT4X4:2|~575~1
LC9  -> - - - - - - - * - * * * * * - - | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~119~1
LC33 -> - - - - - * - - * * * - * - - - | - * * * * - - - | <-- |mult5x5:1|PUTIN:1|~128~1
LC2  -> - - - - - * - - * - - - - - - - | * * - * * - - - | <-- |mult5x5:1|PUTIN:1|~191~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                 d:\ajun\final.rpt
final

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                     Logic cells placed in LAB 'F'
        +----------- LC94 S5
        | +--------- LC91 Y10

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