defts201.h

基于ADSP TS201的DMA传输程序

#define LRCTL_RDSIZE_P (4)
#define LRCTL_ROVRE_P (5)
#define LRCTL_RINIF_P (6)
#define LRCTL_RINIV_P (7)

// Bit Masks
#define LRCTL_REN MAKE_BITMASK_(LRCTL_REN_P)
#define LRCTL_RVERE MAKE_BITMASK_(LRCTL_RVERE_P)
#define LRCTL_RTOE MAKE_BITMASK_(LRCTL_RTOE_P)
#define LRCTL_RBCMPE MAKE_BITMASK_(LRCTL_RBCMPE_P)
#define LRCTL_RDSIZE MAKE_BITMASK_(LRCTL_RDSIZE_P)
#define LRCTL_ROVRE MAKE_BITMASK_(LRCTL_ROVRE_P)
#define LRCTL_RINIF MAKE_BITMASK_(LRCTL_RINIF_P)
#define LRCTL_RINIV MAKE_BITMASK_(LRCTL_RINIV_P)

//* Link Transmit Control Registers with Bit Masks *
#define LTCTL0_LOC (0x1F00E4)
#define LTCTL1_LOC (0x1F00E5)
#define LTCTL2_LOC (0x1F00E6)
#define LTCTL3_LOC (0x1F00E7)

// Bit positions
#define LTCTL_TEN_P (0)
#define LTCTL_TVERE_P (1)
#define LTCTL_TTOE_P (2)
#define LTCTL_TBCMPE_P (3)
#define LTCTL_TDSIZE_P (4)

// Bit Masks
#define LTCTL_TEN MAKE_BITMASK_(LTCTL_TEN_P)
#define LTCTL_TVERE MAKE_BITMASK_(LTCTL_TVERE_P)
#define LTCTL_TTOE MAKE_BITMASK_(LTCTL_TTOE_P)
#define LTCTL_TBCMPE MAKE_BITMASK_(LTCTL_TBCMPE_P)
#define LTCTL_TDSIZE MAKE_BITMASK_(LTCTL_TDSIZE_P)
#define LTCTL_TCLKDIV1 (0x00000000)
#define LTCTL_TCLKDIV1P5 (0x00000020)
#define LTCTL_TCLKDIV2 (0x00000040)
#define LTCTL_TCLKDIV4 (0x00000080)

//* Link Status Registers with Bit Masks *
#define LRSTAT0_LOC (0x1F00F0)
#define LRSTAT1_LOC (0x1F00F1)
#define LRSTAT2_LOC (0x1F00F2)
#define LRSTAT3_LOC (0x1F00F3)

#define LTSTAT0_LOC (0x1F00F4)
#define LTSTAT1_LOC (0x1F00F5)
#define LTSTAT2_LOC (0x1F00F6)
#define LTSTAT3_LOC (0x1F00F7)

#define LRSTATC0_LOC (0x1F00F8)
#define LRSTATC1_LOC (0x1F00F9)
#define LRSTATC2_LOC (0x1F00FA)
#define LRSTATC3_LOC (0x1F00FB)

#define LTSTATC0_LOC (0x1F00FC)
#define LTSTATC1_LOC (0x1F00FD)
#define LTSTATC2_LOC (0x1F00FE)
#define LTSTATC3_LOC (0x1F00FF)

// Bit positions - Receive Status
#define LRSTAT_RTER_P (2)
#define LRSTAT_RWER_P (3)
#define LRSTAT_RCSER_P (4)
#define LRSTAT_ROVER_P (5)

// Bit positions - Transmit Status
#define LTSTAT_TVACANT_P (0)
#define LTSTAT_TEMPTY_P (1)
#define LTSTAT_TTER_P (2)
#define LTSTAT_TWER_P (3)

// Bit Masks - Receive Status
#define LRSTAT_RSTAT (0x00000003)
#define LRSTAT_RTER MAKE_BITMASK_(LRSTAT_RTER_P)
#define LRSTAT_RWER MAKE_BITMASK_(LRSTAT_RWER_P)
#define LRSTAT_RCSER MAKE_BITMASK_(LRSTAT_RCSER_P)
#define LRSTAT_ROVER MAKE_BITMASK_(LRSTAT_ROVER_P)

// Bit Masks - Transmit Status
#define LTSTAT_TVACANT MAKE_BITMASK_(LTSTAT_TVACANT_P)
#define LTSTAT_TEMPTY MAKE_BITMASK_(LTSTAT_TEMPTY_P)
#define LTSTAT_TTER MAKE_BITMASK_(LTSTAT_TTER_P)
#define LTSTAT_TWER MAKE_BITMASK_(LTSTAT_TWER_P)

//* Interrupt Vectors (except SW interrupt) *

#define IVKERNEL_LOC (0x1F0300)
#define IVTIMER0LP_LOC (0x1F0302)
#define IVTIMER1LP_LOC (0x1F0303)
#define IVLINK0_LOC (0x1F0306)
#define IVLINK1_LOC (0x1F0307)
#define IVLINK2_LOC (0x1F0308)
#define IVLINK3_LOC (0x1F0309)
#define IVDMA0_LOC (0x1F030E)
#define IVDMA1_LOC (0x1F030F)
#define IVDMA2_LOC (0x1F0310)
#define IVDMA3_LOC (0x1F0311)
#define IVDMA4_LOC (0x1F0316)
#define IVDMA5_LOC (0x1F0317)
#define IVDMA6_LOC (0x1F0318)
#define IVDMA7_LOC (0x1F0319)
#define IVDMA8_LOC (0x1F031D)
#define IVDMA9_LOC (0x1F031E)
#define IVDMA10_LOC (0x1F031F)
#define IVDMA11_LOC (0x1F0320)
#define IVDMA12_LOC (0x1F0325)
#define IVDMA13_LOC (0x1F0326)
#define IVIRQ0_LOC (0x1F0329)
#define IVIRQ1_LOC (0x1F032A)
#define IVIRQ2_LOC (0x1F032B)
#define IVIRQ3_LOC (0x1F032C)
#define VIRPT_LOC (0x1F0330)
#define IVBUSLK_LOC (0x1F0332)
#define IVBUSLOCK_LOC (0x1F0332)				// added 5/6/04 per request of VDK to maintain compat with TS101
#define IVTIMER0HP_LOC (0x1F0334)
#define IVTIMER1HP_LOC (0x1F0335)
#define IVHW_LOC (0x1F0339)

//* ILAT, IMASK and PMASK with bit defines *

#define ILATL_LOC (0x1F0340)
#define ILATH_LOC (0x1F0341)
#define ILATSTL_LOC (0x1F0342)
#define ILATSTH_LOC (0x1F0343)
#define ILATCLL_LOC (0x1F0344)
#define ILATCLH_LOC (0x1F0345)
#define PMASKL_LOC (0x1F0346)
#define PMASKH_LOC (0x1F0347)
#define IMASKL_LOC (0x1F0348)
#define IMASKH_LOC (0x1F0349)

// Bit positions
#define INT_KERNEL_P (0)
#define INT_RES1_P (1)
#define INT_TIMER0L_P (2)
#define INT_TIMER1L_P (3)
#define INT_RES4_P (4)
#define INT_RES5_P (5)
#define INT_LINK0_P (6)
#define INT_LINK1_P (7)
#define INT_LINK2_P (8)
#define INT_LINK3_P (9)
#define INT_RES_10_P (10)
#define INT_RES_11_P (11)
#define INT_RES_12_P (12)
#define INT_RES_13_P (13)
#define INT_DMA0_P (14)
#define INT_DMA1_P (15)
#define INT_DMA2_P (16)
#define INT_DMA3_P (17)
#define INT_RES18_P (18)
#define INT_RES19_P (19)
#define INT_RES20_P (20)
#define INT_RES21_P (21)
#define INT_DMA4_P (22)
#define INT_DMA5_P (23)
#define INT_DMA6_P (24)
#define INT_DMA7_P (25)
#define INT_RES26_P (26)
#define INT_RES27_P (27)
#define INT_RES28_P (28)
#define INT_DMA8_P (29)
#define INT_DMA9_P (30)
#define INT_DMA10_P (31)
#define INT_DMA11_P (0)
#define INT_RES33_P (1)
#define INT_RES34_P (2)
#define INT_RES35_P (3)
#define INT_RES36_P (4)
#define INT_DMA12_P (5)
#define INT_DMA13_P (6)
#define INT_RES39_P (7)
#define INT_RES40_P (8)
#define INT_IRQ0_P (9)
#define INT_IRQ1_P (10)
#define INT_IRQ2_P (11)
#define INT_IRQ3_P (12)
#define INT_RES45_P (13)
#define INT_RES46_P (14)
#define INT_RES47_P (15)
#define INT_VIRPT_P (16)
#define INT_RES49_P (17)
#define INT_BUSLOCK_P (18)
#define INT_RES51_P (19)
#define INT_TIMER0H_P (20)
#define INT_TIMER1H_P (21)
#define INT_RES54_P (22)
#define INT_RES55_P (23)
#define INT_RES56_P (24)
#define INT_HWERR_P (25)
#define INT_RES58_P (26)
#define INT_RES59_P (27)
#define INT_RES61_P (29)

// Bit Masks for C only
#define INT_KERNEL_64 MAKE_LL_BITMASK_(INT_KERNEL_P + 0 )
#define INT_RES1_64 MAKE_LL_BITMASK_(INT_RES1_P + 0 )
#define INT_TIMER0L_64 MAKE_LL_BITMASK_(INT_TIMER0L_P + 0 )
#define INT_TIMER1L_64 MAKE_LL_BITMASK_(INT_TIMER1L_P + 0 )
#define INT_RES4_64 MAKE_LL_BITMASK_(INT_RES4_P + 0 )
#define INT_RES5_64 MAKE_LL_BITMASK_(INT_RES5_P + 0 )
#define INT_LINK0_64 MAKE_LL_BITMASK_(INT_LINK0_P + 0 )
#define INT_LINK1_64 MAKE_LL_BITMASK_(INT_LINK1_P + 0 )
#define INT_LINK2_64 MAKE_LL_BITMASK_(INT_LINK2_P + 0 )
#define INT_LINK3_64 MAKE_LL_BITMASK_(INT_LINK3_P + 0 )
#define INT_RES_10_64 MAKE_LL_BITMASK_(INT_RES_10_P + 0 )
#define INT_RES_11_64 MAKE_LL_BITMASK_(INT_RES_11_P + 0 )
#define INT_RES_12_64 MAKE_LL_BITMASK_(INT_RES_12_P + 0 )
#define INT_RES_13_64 MAKE_LL_BITMASK_(INT_RES_13_P + 0 )
#define INT_DMA0_64 MAKE_LL_BITMASK_(INT_DMA0_P + 0 )
#define INT_DMA1_64 MAKE_LL_BITMASK_(INT_DMA1_P + 0 )
#define INT_DMA2_64 MAKE_LL_BITMASK_(INT_DMA2_P + 0 )
#define INT_DMA3_64 MAKE_LL_BITMASK_(INT_DMA3_P + 0 )
#define INT_RES18_64 MAKE_LL_BITMASK_(INT_RES18_P + 0 )
#define INT_RES19_64 MAKE_LL_BITMASK_(INT_RES19_P + 0 )
#define INT_RES20_64 MAKE_LL_BITMASK_(INT_RES20_P + 0 )
#define INT_RES21_64 MAKE_LL_BITMASK_(INT_RES21_P + 0 )
#define INT_DMA4_64 MAKE_LL_BITMASK_(INT_DMA4_P + 0 )
#define INT_DMA5_64 MAKE_LL_BITMASK_(INT_DMA5_P + 0 )
#define INT_DMA6_64 MAKE_LL_BITMASK_(INT_DMA6_P + 0 )
#define INT_DMA7_64 MAKE_LL_BITMASK_(INT_DMA7_P + 0 )
#define INT_RES26_64 MAKE_LL_BITMASK_(INT_RES26_P + 0 )
#define INT_RES27_64 MAKE_LL_BITMASK_(INT_RES27_P + 0 )
#define INT_RES28_64 MAKE_LL_BITMASK_(INT_RES28_P + 0 )
#define INT_DMA8_64 MAKE_LL_BITMASK_(INT_DMA8_P + 0 )
#define INT_DMA9_64 MAKE_LL_BITMASK_(INT_DMA9_P + 0 )
#define INT_DMA10_64 MAKE_LL_BITMASK_(INT_DMA10_P + 0 )
#define INT_DMA11_64 MAKE_LL_BITMASK_(INT_DMA11_P + 32)
#define INT_RES33_64 MAKE_LL_BITMASK_(INT_RES33_P + 32)
#define INT_RES34_64 MAKE_LL_BITMASK_(INT_RES34_P + 32)
#define INT_RES35_64 MAKE_LL_BITMASK_(INT_RES35_P + 32)
#define INT_RES36_64 MAKE_LL_BITMASK_(INT_RES36_P + 32)
#define INT_DMA12_64 MAKE_LL_BITMASK_(INT_DMA12_P + 32)
#define INT_DMA13_64 MAKE_LL_BITMASK_(INT_DMA13_P + 32)
#define INT_RES39_64 MAKE_LL_BITMASK_(INT_RES39_P + 32)
#define INT_RES40_64 MAKE_LL_BITMASK_(INT_RES40_P + 32)
#define INT_IRQ0_64 MAKE_LL_BITMASK_(INT_IRQ0_P + 32)
#define INT_IRQ1_64 MAKE_LL_BITMASK_(INT_IRQ1_P + 32)
#define INT_IRQ2_64 MAKE_LL_BITMASK_(INT_IRQ2_P + 32)
#define INT_IRQ3_64 MAKE_LL_BITMASK_(INT_IRQ3_P + 32)
#define INT_RES45_64 MAKE_LL_BITMASK_(INT_RES45_P + 32)
#define INT_RES46_64 MAKE_LL_BITMASK_(INT_RES46_P + 32)
#define INT_RES47_64 MAKE_LL_BITMASK_(INT_RES47_P + 32)
#define INT_VIRPT_64 MAKE_LL_BITMASK_(INT_VIRPT_P + 32)
#define INT_RES49_64 MAKE_LL_BITMASK_(INT_RES49_P + 32)
#define INT_BUSLOCK_64 MAKE_LL_BITMASK_(INT_BUSLOCK_P + 32)
#define INT_RES51_64 MAKE_LL_BITMASK_(INT_RES51_P + 32)
#define INT_TIMER0H_64 MAKE_LL_BITMASK_(INT_TIMER0H_P + 32)
#define INT_TIMER1H_64 MAKE_LL_BITMASK_(INT_TIMER1H_P + 32)
#define INT_RES54_64 MAKE_LL_BITMASK_(INT_RES54_P + 32)
#define INT_RES55_64 MAKE_LL_BITMASK_(INT_RES55_P + 32)
#define INT_RES56_64 MAKE_LL_BITMASK_(INT_RES56_P + 32)
#define INT_HWERR_64 MAKE_LL_BITMASK_(INT_HWERR_P + 32)
#define INT_RES58_64 MAKE_LL_BITMASK_(INT_RES58_P + 32)
#define INT_RES59_64 MAKE_LL_BITMASK_(INT_RES59_P + 32)
#define INT_RES61_64 MAKE_LL_BITMASK_(INT_RES61_P + 32)

// Bit Masks
#define INT_KERNEL MAKE_BITMASK_(INT_KERNEL_P )
#define INT_RES1 MAKE_BITMASK_(INT_RES1_P )
#define INT_TIMER0L MAKE_BITMASK_(INT_TIMER0L_P)
#define INT_TIMER1L MAKE_BITMASK_(INT_TIMER1L_P)
#define INT_RES4 MAKE_BITMASK_(INT_RES4_P )
#define INT_RES5 MAKE_BITMASK_(INT_RES5_P )
#define INT_LINK0 MAKE_BITMASK_(INT_LINK0_P )
#define INT_LINK1 MAKE_BITMASK_(INT_LINK1_P )
#define INT_LINK2 MAKE_BITMASK_(INT_LINK2_P )
#define INT_LINK3 MAKE_BITMASK_(INT_LINK3_P )
#define INT_RES_10 MAKE_BITMASK_(INT_RES_10_P )
#define INT_RES_11 MAKE_BITMASK_(INT_RES_11_P )
#define INT_RES_12 MAKE_BITMASK_(INT_RES_12_P )
#define INT_RES_13 MAKE_BITMASK_(INT_RES_13_P )
#define INT_DMA0 MAKE_BITMASK_(INT_DMA0_P )
#define INT_DMA1 MAKE_BITMASK_(INT_DMA1_P )
#define INT_DMA2 MAKE_BITMASK_(INT_DMA2_P )
#define INT_DMA3 MAKE_BITMASK_(INT_DMA3_P )
#define INT_RES18 MAKE_BITMASK_(INT_RES18_P )
#define INT_RES19 MAKE_BITMASK_(INT_RES19_P )
#define INT_RES20 MAKE_BITMASK_(INT_RES20_P )
#define INT_RES21 MAKE_BITMASK_(INT_RES21_P )
#define INT_DMA4 MAKE_BITMASK_(INT_DMA4_P )
#define INT_DMA5 MAKE_BITMASK_(INT_DMA5_P )
#define INT_DMA6 MAKE_BITMASK_(INT_DMA6_P )
#define INT_DMA7 MAKE_BITMASK_(INT_DMA7_P )
#define INT_RES26 MAKE_BITMASK_(INT_RES26_P )
#define INT_RES27 MAKE_BITMASK_(INT_RES27_P )
#define INT_RES28 MAKE_BITMASK_(INT_RES28_P )
#define INT_DMA8 MAKE_BITMASK_(INT_DMA8_P )
#define INT_DMA9 MAKE_BITMASK_(INT_DMA9_P )
#define INT_DMA10 MAKE_BITMASK_(INT_DMA10_P )
#define INT_DMA11 MAKE_BITMASK_(INT_DMA11_P )
#define INT_RES33 MAKE_BITMASK_(INT_RES33_P )
#define INT_RES34 MAKE_BITMASK_(INT_RES34_P )
#define INT_RES35 MAKE_BITMASK_(INT_RES35_P )
#define INT_RES36 MAKE_BITMASK_(INT_RES36_P )
#define INT_DMA12 MAKE_BITMASK_(INT_DMA12_P )
#define INT_DMA13 MAKE_BITMASK_(INT_DMA13_P )
#define INT_RES39 MAKE_BITMASK_(INT_RES39_P )
#define INT_RES40 MAKE_BITMASK_(INT_RES40_P )
#define INT_IRQ0 MAKE_BITMASK_(INT_IRQ0_P )
#define INT_IRQ1 MAKE_BITMASK_(INT_IRQ1_P )
#define INT_IRQ2 MAKE_BITMASK_(INT_IRQ2_P )
#define INT_IRQ3 MAKE_BITMASK_(INT_IRQ3_P )
#define INT_RES45 MAKE_BITMASK_(INT_RES45_P )
#define INT_RES46 MAKE_BITMASK_(INT_RES46_P )
#define INT_RES47 MAKE_BITMASK_(INT_RES47_P )
#define INT_VIRPT MAKE_BITMASK_(INT_VIRPT_P )
#define INT_RES49 MAKE_BITMASK_(INT_RES49_P )
#define INT_BUSLOCK MAKE_BITMASK_(INT_BUSLOCK_P)
#define INT_RES51 MAKE_BITMASK_(INT_RES51_P )
#define INT_TIMER0H MAKE_BITMASK_(INT_TIMER0H_P)
#define INT_TIMER1H MAKE_BITMASK_(INT_TIMER1H_P)
#define INT_RES54 MAKE_BITMASK_(INT_RES54_P )
#define INT_RES55 MAKE_BITMASK_(INT_RES55_P )
#define INT_RES56 MAKE_BITMASK_(INT_RES56_P )
#define INT_HWERR MAKE_BITMASK_(INT_HWERR_P )
#define INT_RES58 MAKE_BITMASK_(INT_RES58_P )
#define INT_RES59 MAKE_BITMASK_(INT_RES59_P )
#define INT_RES61 MAKE_BITMASK_(INT_RES61_P )

//* Interrupt Control Register with Bit Defines *
#define INTCTL_LOC (0x1F034E)

// Bit positions
#define INTCTL_IRQ0_EDGE_P (0)
#define INTCTL_IRQ1_EDGE_P (1)
#define INTCTL_IRQ2_EDGE_P (2)
#define INTCTL_IRQ3_EDGE_P (3)
#define INTCTL_TMR0RN_P (4)
#define INTCTL_TMR1RN_P (5)

// Bit masks
#define INTCTL_IRQ0_EDGE MAKE_BITMASK_(INTCTL_IRQ0_EDGE_P )
#define INTCTL_IRQ1_EDGE MAKE_BITMASK_(INTCTL_IRQ1_EDGE_P )
#define INTCTL_IRQ2_EDGE MAKE_BITMASK_(INTCTL_IRQ2_EDGE_P )
#define INTCTL_IRQ3_EDGE MAKE_BITMASK_(INTCTL_IRQ3_EDGE_P )
#define INTCTL_TMR0RN MAKE_BITMASK_(INTCTL_TMR0RN_P )
#define INTCTL_TMR1RN MAKE_BITMASK_(INTCTL_TMR1RN_P )

//* Timer Registers *
#define TIMER0L_LOC (0x1F0350)
#define TIMER0H_LOC (0x1F0351)
#define TIMER1L_LOC (0x1F0352)
#define TIMER1H_LOC (0x1F0353)
#define TMRIN0L_LOC (0x1F0354)
#define TMRIN0H_LOC (0x1F0355)
#define TMRIN1L_LOC (0x1F0356)
#define TMRIN1H_LOC (0x1F0357)

//* Emulation Registers II *

//* EMUCTL With Bit Defines *
#define EMUCTL_LOC (0x1F03A0)

// Bit positions
#define EMUCTL_EMEN_P (0)
#define EMUCTL_TEME_P (1)
#define EMUCTL_EMUOE_P (2)
#define EMUCTL_SPFDIS_P (3)
#define EMUCTL_SWRST_P (4)
#define EMUCTL_BOOTDSBL_P (5)

// Bit Masks
#define EMUCTL_EMEN MAKE_BITMASK_(EMUCTL_EMEN_P) 
#define EMUCTL_TEME MAKE_BITMASK_(EMUCTL_TEME_P)
#define EMUCTL_EMUOE MAKE_BITMASK_(EMUCTL_EMUOE_P)
#define EMUCTL_SPFDIS MAKE_BITMASK_(EMUCTL_SPFDIS_P)
#define EMUCTL_SWRST MAKE_BITMASK_(EMUCTL_SWRST_P)
#define EMUCTL_BOOTDSBL MAKE_BITMASK_(EMUCTL_BOOTDSBL_P)

//* EMUSTAT With Bit Defines *
#define EMUSTAT_LOC (0x1F03A1)

// Bit positions
#define EMUSTAT_EMUMOD_P (0)
#define EMUSTAT_IRFREE_P (1)
#define EMUSTAT_INRESET_P (2)

// Bit Masks
#define EMUSTAT_EMUMOD MAKE_BITMASK_(EMUSTAT_EMUMOD_P)
#define EMUSTAT_IRFREE MAKE_BITMASK_(EMUSTAT_IRFREE_P)
#define EMUSTAT_INRESET MAKE_BITMASK_(EMUSTAT_INRESET_P)

//*
#define EMUDAT_LOC (0x1F03A2)
#define IDCODE_LOC (0x1F03A3)
#define EMUIR_LOC (0x1F03A4)

//* Trace Buffer Registers *

#define TRCB0_LOC (0x1E0140)
#define TRCB1_LOC (0x1E0141)
#define TRCB2_LOC (0x1E0142)
#define TRCB3_LOC (0x1E0143)
#define TRCB4_LOC (0x1E0144)
#define TRCB5_LOC (0x1E0145)
#define TRCB6_LOC (0x1E0146)
#define TRCB7_LOC (0x1E0147)
#define TRCB8_LOC (0x1E0148)
#define TRCB9_LOC (0x1E0149)
#define TRCB10_LOC (0x1E014A)
#define TRCB11_LOC (0x1E014B)
#define TRCB12_LOC (0x1E014C)
#define TRCB13_LOC (0x1E014D)
#define TRCB14_LOC (0x1E014E)
#define TRCB15_LOC (0x1E014F)
#define TRCB16_LOC (0x1E0150)
#define TRCB17_LOC (0x1E0151)
#define TRCB18_LOC (0x1E0152)
#define TRCB19_LOC (0x1E0153)
#define TRCB20_LOC (0x1E0154)
#define TRCB21_LOC (0x1E0155)
#define TRCB22_LOC (0x1E0156)
#define TRCB23_LOC (0x1E0157)
#define TRCB24_LOC (0x1E0158)
#define TRCB25_LOC (0x1E0159)
#define TRCB26_LOC (0x1E015A)
#define TRCB27_LOC (0x1E015B)
#define TRCB28_LOC (0x1E015C)
#define TRCB29_LOC (0x1E015D)
#define TRCB30_LOC (0x1E015E)
#define TRCB31_LOC (0x1E015F)

//*

#define AUTODMA0_LOC (0x1F03E0)
#define AUTODMA1_LOC (0x1F03E4)

//* Global memory *

#define BLOCK0_LOC (0x00000000) // Internal memory block 0
#define BLOCK2_LOC (0x00040000) // Internal memory block 2
#define BLOCK4_LOC (0x00080000) // Internal memory block 4
#define BLOCK6_LOC (0x000C0000) // Internal memory block 6
#define BLOCK8_LOC (0x00100000) // Internal memory block 8
#define BLOCK10_LOC (0x00140000) // Internal memory block 10

#define BCST_OFFSET_LOC (0x0C000000) // Broadcast MP memory offset
#define P0_OFFSET_LOC (0x10000000) // Processor ID0 MP memory offset
#define P1_OFFSET_LOC (0x14000000) // Processor ID1 MP memory offset
#define P2_OFFSET_LOC (0x18000000) // Processor ID2 MP memory offset
#define P3_OFFSET_LOC (0x1C000000) // Processor ID3 MP memory offset
#define P4_OFFSET_LOC (0x20000000) // Processor ID4 MP memory offset
#define P5_OFFSET_LOC (0x24000000) // Processor ID5 MP memory offset
#define P6_OFFSET_LOC (0x28000000) // Processor ID6 MP memory offset
#define P7_OFFSET_LOC (0x2C000000) // Processor ID7 MP memory offset

#endif // !defined(__DEFTS201_H_)