external_mem.c

基于ADSP TS201的DMA传输程序

/********************************************************************************************************************************/
/*		This program uses DMA channel 0 to DMA N words from internal memory to external SDRAM. Once this DMA has completed	    */
/*		DMA channel 0 is then set up to DMA the N words stored in external memory back to internal memory.					    */
/*																															    */
/*		The original data to be transmitted is stored in the file tx_data.dat. This data is placed in the buffer named "data_tx"*/
/*		within the internal memory.																								*/
/*																																*/
/*		The buffer in the external SDRAM where the data originally transmitted is stored into is named "sdram_data"				*/
/*																																*/
/*		The buffer named "data_rx" is where the data transmitted from SDRAM to internal memory is stored						*/
/********************************************************************************************************************************/


#include <stdio.h>
#include <complex.h>
#include <builtins.h>
#include <sysreg.h>
#include <defts201.h>
#include <signal.h>
#include <string.h> 


#define N 64										// Number of words to transfer

section("data2a")
int  data_tx[N] = {							     	// Data to be transmitted to external memory
                        #include "tx_data.dat"
                          };

section("data2a")
int data_rx[N];								    	// Data received back from external memory

section("SD0")
int sdram_data[N];				                                    // Data received in external memory

struct TCB {
	int *DI;										// index
	int DX;											// count and stride in x direction
	int DY;											// count and stride in y direction
	int DP;											// DMA control word
};

struct TCB TCB_temp;								// Temp structure for programming TCBs

__builtin_quad q;									// Temp quad for programming TCBs

void dma0_int();									// Prototype for interrupt service routine
void dma1_int();

void main(void)
{
	int i=0;
	//  __builtin_sysreg_srite( __SYSCON, 0x001A79E7);	
       __builtin_sysreg_write( __SYSCON,
                            SYSCON_MP_WID64    |
                            SYSCON_MEM_WID64   |
							SYSCON_MSH_SLOW	   | 
							SYSCON_MSH_WT3	   | 
							SYSCON_MSH_IDLE    |
							SYSCON_MS1_SLOW    | 
							SYSCON_MS1_WT3 	   | 
							SYSCON_MS1_IDLE    |
							SYSCON_MS0_SLOW    | 
							SYSCON_MS0_WT3	   |	
							SYSCON_MS0_IDLE 	                 // 32-bit Host bus
							);  	                             // 64-bit external bus for memory (MBUB)
//		__builtin_sysreg_write( __SDRCON, 0x00005903);					
       __builtin_sysreg_write( __SDRCON,
                            SDRCON_INIT   |
                            SDRCON_RAS2PC5|
                            SDRCON_PC2RAS2|
                            SDRCON_REF2200|
                            SDRCON_PG256  |
                            SDRCON_CLAT2  |
                            SDRCON_ENBL
                             );                                                             // SDRAM enabled, CAS LATENCY = three, Pipe Depth = 0, Page Boundry = 256,
													// Refresh Rate = 2200, PRC to RAS DELAY = 3, RAS TO PRC DELAY = 5,
													// INIT Sequence = REFRESH then MRS(MBUB)
	
	interrupt(SIGDMA0, dma0_int);					        // Assign isr to DMA channel 0
													
	TCB_temp.DI = data_tx;							// index points to source buffer
	TCB_temp.DX = 4 | (N << 16);					       // modify is 4 for quad-word transfers, count is N and must be shifted to upper half 
	TCB_temp.DY = 0;								// only a 1 dimension DMA
	TCB_temp.DP = TCB_INTMEM|TCB_QUAD|TCB_INT;	// control word set for quad-word transfers to internal memory with interrupt enabled

	q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
	__builtin_sysreg_write4(__DCS0, q);				// program the TCBs

	TCB_temp.DI = sdram_data;						// index points to buffer in SDRAM
	TCB_temp.DP = TCB_EXTMEM|TCB_QUAD|TCB_INT;						// control word set for quad-word transfers to external memory with interrupt enabled

	q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
	__builtin_sysreg_write4(__DCD0, q);				// program the TCBs


	while(1)										// Endless loop
		i=i-i;
}


/*********************************************************************************************************************************************/
/*	DMA0 Interrupt Service Routine ***********************************************************************************************************/
/*********************************************************************************************************************************************/
void dma0_int()										           // First isr for DMA channel 0
{		
	interrupt(SIGDMA1, dma1_int);					              // Assign isr to DMA channel 1
	  
	TCB_temp.DI = sdram_data;					             // index points to source buffer in external memory
	TCB_temp.DX = 4 | (N << 16);
	TCB_temp.DY = 0;
	TCB_temp.DP = TCB_EXTMEM|TCB_QUAD|TCB_INT;		// control word set for quad-word transfers to external memory with interrupt enabled
	

	q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
	__builtin_sysreg_write4(__DCS1, q);				               // program the TCBs

	TCB_temp.DI = data_rx;							       // index points to destination buffer in internal memory
	TCB_temp.DP = TCB_INTMEM|TCB_QUAD|TCB_INT;		// control word set for quad-word transfers to internal memory with interrupt enabled

	q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
	__builtin_sysreg_write4(__DCD1, q);				            // program the TCBs	
	
return;
}

/*********************************************************************************************************************************************/
/*	DMA1 Interrupt Service Routine ***********************************************************************************************************/
/*********************************************************************************************************************************************/
void dma1_int()										// First isr for DMA channel 1
{		
	printf("\nExternal memory DMAs completed\n"); 
	return;
}