📄 multbcd.tan.rpt
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Classic Timing Analyzer report for MultBCD
Thu Apr 30 14:12:17 2009
Quartus II Version 8.1 Build 163 10/28/2008 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 14.623 ns ; B[1] ; R[6] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP2C35F672C6 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Default hold multicycle ; Same as Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
; Minimum Core Junction Temperature ; 0 ; ; ; ;
; Maximum Core Junction Temperature ; 85 ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Perform Multicorner Analysis ; On ; ; ; ;
; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off ; ; ; ;
; Output I/O Timing Endpoint ; Near End ; ; ; ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+------+------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+------+
; N/A ; None ; 14.623 ns ; B[1] ; R[6] ;
; N/A ; None ; 14.598 ns ; B[1] ; R[7] ;
; N/A ; None ; 14.519 ns ; A[1] ; R[6] ;
; N/A ; None ; 14.494 ns ; A[1] ; R[7] ;
; N/A ; None ; 13.914 ns ; A[3] ; R[6] ;
; N/A ; None ; 13.912 ns ; B[1] ; R[5] ;
; N/A ; None ; 13.889 ns ; A[3] ; R[7] ;
; N/A ; None ; 13.808 ns ; A[1] ; R[5] ;
; N/A ; None ; 13.677 ns ; B[2] ; R[6] ;
; N/A ; None ; 13.652 ns ; B[2] ; R[7] ;
; N/A ; None ; 13.562 ns ; A[2] ; R[6] ;
; N/A ; None ; 13.537 ns ; A[2] ; R[7] ;
; N/A ; None ; 13.225 ns ; B[1] ; R[4] ;
; N/A ; None ; 13.203 ns ; A[3] ; R[5] ;
; N/A ; None ; 13.121 ns ; A[1] ; R[4] ;
; N/A ; None ; 12.966 ns ; B[2] ; R[5] ;
; N/A ; None ; 12.851 ns ; A[2] ; R[5] ;
; N/A ; None ; 12.528 ns ; B[1] ; R[3] ;
; N/A ; None ; 12.516 ns ; A[3] ; R[4] ;
; N/A ; None ; 12.424 ns ; A[1] ; R[3] ;
; N/A ; None ; 12.279 ns ; B[2] ; R[4] ;
; N/A ; None ; 12.164 ns ; A[2] ; R[4] ;
; N/A ; None ; 12.059 ns ; B[1] ; R[2] ;
; N/A ; None ; 11.959 ns ; B[3] ; R[6] ;
; N/A ; None ; 11.934 ns ; B[3] ; R[7] ;
; N/A ; None ; 11.819 ns ; A[3] ; R[3] ;
; N/A ; None ; 11.589 ns ; B[2] ; R[3] ;
; N/A ; None ; 11.467 ns ; A[2] ; R[3] ;
; N/A ; None ; 11.368 ns ; A[1] ; R[2] ;
; N/A ; None ; 11.248 ns ; B[3] ; R[5] ;
; N/A ; None ; 10.586 ns ; B[1] ; R[1] ;
; N/A ; None ; 10.558 ns ; B[3] ; R[4] ;
; N/A ; None ; 10.344 ns ; B[0] ; R[6] ;
; N/A ; None ; 10.319 ns ; B[0] ; R[7] ;
; N/A ; None ; 10.213 ns ; B[2] ; R[2] ;
; N/A ; None ; 10.146 ns ; A[2] ; R[2] ;
; N/A ; None ; 10.000 ns ; B[3] ; R[3] ;
; N/A ; None ; 9.747 ns ; A[1] ; R[1] ;
; N/A ; None ; 9.688 ns ; A[0] ; R[6] ;
; N/A ; None ; 9.663 ns ; A[0] ; R[7] ;
; N/A ; None ; 9.633 ns ; B[0] ; R[5] ;
; N/A ; None ; 8.977 ns ; A[0] ; R[5] ;
; N/A ; None ; 8.946 ns ; B[0] ; R[4] ;
; N/A ; None ; 8.290 ns ; A[0] ; R[4] ;
; N/A ; None ; 8.249 ns ; B[0] ; R[3] ;
; N/A ; None ; 8.153 ns ; A[0] ; R[0] ;
; N/A ; None ; 7.960 ns ; B[0] ; R[0] ;
; N/A ; None ; 7.593 ns ; A[0] ; R[3] ;
; N/A ; None ; 6.687 ns ; B[0] ; R[2] ;
; N/A ; None ; 6.531 ns ; A[0] ; R[2] ;
; N/A ; None ; 5.746 ns ; B[0] ; R[1] ;
; N/A ; None ; 5.590 ns ; A[0] ; R[1] ;
+-------+-------------------+-----------------+------+------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition
Info: Processing started: Thu Apr 30 14:12:13 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off MultBCD -c MultBCD --timing_analysis_only
Info: Longest tpd from source pin "B[1]" to destination pin "R[6]" is 14.623 ns
Info: 1: + IC(0.000 ns) + CELL(0.850 ns) = 0.850 ns; Loc. = PIN_AE11; Fanout = 7; PIN Node = 'B[1]'
Info: 2: + IC(6.121 ns) + CELL(0.150 ns) = 7.121 ns; Loc. = LCCOMB_X28_Y33_N0; Fanout = 2; COMB Node = 'fulladder:I1|Cout~9'
Info: 3: + IC(0.248 ns) + CELL(0.150 ns) = 7.519 ns; Loc. = LCCOMB_X28_Y33_N26; Fanout = 2; COMB Node = 'fulladder:I2|S'
Info: 4: + IC(0.266 ns) + CELL(0.420 ns) = 8.205 ns; Loc. = LCCOMB_X28_Y33_N2; Fanout = 2; COMB Node = 'fulladder:I5|Cout~7'
Info: 5: + IC(0.459 ns) + CELL(0.438 ns) = 9.102 ns; Loc. = LCCOMB_X29_Y33_N18; Fanout = 2; COMB Node = 'fulladder:I6|S'
Info: 6: + IC(0.258 ns) + CELL(0.419 ns) = 9.779 ns; Loc. = LCCOMB_X29_Y33_N20; Fanout = 2; COMB Node = 'fulladder:I9|Cout~7'
Info: 7: + IC(0.278 ns) + CELL(0.437 ns) = 10.494 ns; Loc. = LCCOMB_X29_Y33_N2; Fanout = 2; COMB Node = 'fulladder:I10|Cout~7'
Info: 8: + IC(0.262 ns) + CELL(0.419 ns) = 11.175 ns; Loc. = LCCOMB_X29_Y33_N12; Fanout = 1; COMB Node = 'fulladder:I11|Cout~7'
Info: 9: + IC(0.620 ns) + CELL(2.828 ns) = 14.623 ns; Loc. = PIN_J10; Fanout = 0; PIN Node = 'R[6]'
Info: Total cell delay = 6.111 ns ( 41.79 % )
Info: Total interconnect delay = 8.512 ns ( 58.21 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 129 megabytes
Info: Processing ended: Thu Apr 30 14:12:19 2009
Info: Elapsed time: 00:00:06
Info: Total CPU time (on all processors): 00:00:01
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