multbcd.map.qmsg

Multiplier BCD - vhdl

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Apr 30 14:09:43 2009 " "Info: Processing started: Thu Apr 30 14:09:43 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off MultBCD -c MultBCD " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off MultBCD -c MultBCD" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../Halfadder/Halfadder.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../Halfadder/Halfadder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 halfadder-arc " "Info: Found design unit 1: halfadder-arc" {  } { { "../Halfadder/Halfadder.vhd" "" { Text "C:/altera/81/quartus/Xiuh/Halfadder/Halfadder.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 halfadder " "Info: Found entity 1: halfadder" {  } { { "../Halfadder/Halfadder.vhd" "" { Text "C:/altera/81/quartus/Xiuh/Halfadder/Halfadder.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../Fulladder/Fulladder.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../Fulladder/Fulladder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fulladder-arc " "Info: Found design unit 1: fulladder-arc" {  } { { "../Fulladder/Fulladder.vhd" "" { Text "C:/altera/81/quartus/Xiuh/Fulladder/Fulladder.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 fulladder " "Info: Found entity 1: fulladder" {  } { { "../Fulladder/Fulladder.vhd" "" { Text "C:/altera/81/quartus/Xiuh/Fulladder/Fulladder.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "MultBCD.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file MultBCD.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 MultBCD-Arq " "Info: Found design unit 1: MultBCD-Arq" {  } { { "MultBCD.vhd" "" { Text "C:/altera/81/quartus/Xiuh/MultBCD/MultBCD.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 MultBCD " "Info: Found entity 1: MultBCD" {  } { { "MultBCD.vhd" "" { Text "C:/altera/81/quartus/Xiuh/MultBCD/MultBCD.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "MultBCD " "Info: Elaborating entity \"MultBCD\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "halfadder halfadder:I0 " "Info: Elaborating entity \"halfadder\" for hierarchy \"halfadder:I0\"" {  } { { "MultBCD.vhd" "I0" { Text "C:/altera/81/quartus/Xiuh/MultBCD/MultBCD.vhd" 54 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fulladder fulladder:I1 " "Info: Elaborating entity \"fulladder\" for hierarchy \"fulladder:I1\"" {  } { { "MultBCD.vhd" "I1" { Text "C:/altera/81/quartus/Xiuh/MultBCD/MultBCD.vhd" 55 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "45 " "Info: Implemented 45 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "8 " "Info: Implemented 8 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "29 " "Info: Implemented 29 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "177 " "Info: Peak virtual memory: 177 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 30 14:10:00 2009 " "Info: Processing ended: Thu Apr 30 14:10:00 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:17 " "Info: Elapsed time: 00:00:17" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Info: Total CPU time (on all processors): 00:00:04" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}