keys_display.vhd

增加有去抖模块等的fpga控制矩阵键盘的源代码及RTL级的模块图

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity keys_display is
port(seltmp:in std_logic_vector(2 downto 0);
	bcdin:in std_logic_vector(31 downto 0);
	segout:out std_logic_vector(6 downto 0));
end keys_display;

architecture one of keys_display is
signal db:std_logic_vector(3 downto 0);
signal seg:std_logic_vector(6 downto 0);
begin

multiplexer:block
begin
db<=bcdin(3 downto 0) when seltmp=0 else
	bcdin(7 downto 4) when seltmp=1 else
	bcdin(11 downto 8) when seltmp=2 else
	bcdin(15 downto 12) when seltmp=3 else
	bcdin(19 downto 16) when seltmp=4 else
	bcdin(23 downto 20) when seltmp=5 else
	bcdin(27 downto 24) when seltmp=6 else
	bcdin(31 downto 28);	
end block multiplexer;


seven_segment:block
begin
seg<=
	"1111110" when db="0000" else
	"0110000" when db="0001" else
	"1101101" when db="0010" else
	"1111001" when db="0011" else
	"0110011" when db="0100" else
	"1011011" when db="0101" else
	"1011111" when db="0110" else
	"1110000" when db="0111" else
	"1111111" when db="1000" else
	"1111011" when db="1001" else
	"1110111" when db="1010" else
	"0011111" when db="1011" else
	"0111101" when db="1100" else
	"1001110" when db="1101" else
	"1001111" when db="1110" else
	"0000000" when db="1111" else
	"0000000";
end block seven_segment;
end one;