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📄 lcd_control.map.rpt

📁 用FPGA设计12832中文液晶控制器,采用状态机的方式
💻 RPT
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; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN       ; Untyped                       ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN       ; Untyped                       ;
; ENABLE_ECC                         ; FALSE                 ; Untyped                       ;
; DEVICE_FAMILY                      ; Cyclone               ; Untyped                       ;
; CBXI_PARAMETER                     ; altsyncram_mp51       ; Untyped                       ;
+------------------------------------+-----------------------+-------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|sld_mod_ram_rom:mgl_prim2 ;
+-------------------------+-----------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value     ; Type                                                                                                          ;
+-------------------------+-----------+---------------------------------------------------------------------------------------------------------------+
; SLD_NODE_INFO           ; 135818752 ; Signed Integer                                                                                                ;
; SLD_AUTO_INSTANCE_INDEX ; yes       ; String                                                                                                        ;
; SLD_IP_VERSION          ; 1         ; Signed Integer                                                                                                ;
; SLD_IP_MINOR_VERSION    ; 3         ; Signed Integer                                                                                                ;
; SLD_COMMON_IP_VERSION   ; 0         ; Signed Integer                                                                                                ;
; width_word              ; 8         ; Untyped                                                                                                       ;
; numwords                ; 32        ; Untyped                                                                                                       ;
; widthad                 ; 5         ; Untyped                                                                                                       ;
; shift_count_bits        ; 4         ; Untyped                                                                                                       ;
; cvalue                  ; 00000000  ; Untyped                                                                                                       ;
; is_data_in_ram          ; 1         ; Untyped                                                                                                       ;
; is_readable             ; 1         ; Untyped                                                                                                       ;
; node_name               ; 822083584 ; Untyped                                                                                                       ;
+-------------------------+-----------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst         ;
+--------------------------+----------------------------------+-----------------+
; Parameter Name           ; Value                            ; Type            ;
+--------------------------+----------------------------------+-----------------+
; sld_hub_ip_version       ; 1                                ; Untyped         ;
; sld_hub_ip_minor_version ; 4                                ; Untyped         ;
; sld_common_ip_version    ; 0                                ; Untyped         ;
; device_family            ; Cyclone                          ; Untyped         ;
; n_nodes                  ; 1                                ; Untyped         ;
; n_sel_bits               ; 1                                ; Untyped         ;
; n_node_ir_bits           ; 5                                ; Untyped         ;
; node_info                ; 00001000000110000110111000000000 ; Unsigned Binary ;
; compilation_mode         ; 1                                ; Untyped         ;
; BROADCAST_FEATURE        ; 1                                ; Signed Integer  ;
; FORCE_IR_CAPTURE_FEATURE ; 1                                ; Signed Integer  ;
+--------------------------+----------------------------------+-----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------+
; In-System Memory Content Editor Settings                                                                                                 ;
+----------------+-------------+-------+-------+------------+------------------------------------------------------------------------------+
; Instance Index ; Instance ID ; Width ; Depth ; Mode       ; Hierarchy Location                                                           ;
+----------------+-------------+-------+-------+------------+------------------------------------------------------------------------------+
; 0              ; 1           ; 8     ; 32    ; Read/Write ; data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated ;
+----------------+-------------+-------+-------+------------+------------------------------------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 8.1 Build 163 10/28/2008 SJ Full Version
    Info: Processing started: Fri Apr 24 10:29:22 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off LCD_Control -c LCD_Control
Info: Found 2 design units, including 1 entities, in source file LCD_Control.vhd
    Info: Found design unit 1: lcd_control-one
    Info: Found entity 1: lcd_control
Info: Found 2 design units, including 1 entities, in source file data_rom.vhd
    Info: Found design unit 1: data_rom-SYN
    Info: Found entity 1: data_rom
Info: Elaborating entity "LCD_Control" for the top level hierarchy
Info: Elaborating entity "data_rom" for hierarchy "data_rom:rom1"
Info: Elaborating entity "altsyncram" for hierarchy "data_rom:rom1|altsyncram:altsyncram_component"
Info: Elaborated megafunction instantiation "data_rom:rom1|altsyncram:altsyncram_component"
Info: Instantiated megafunction "data_rom:rom1|altsyncram:altsyncram_component" with the following parameter:
    Info: Parameter "address_aclr_a" = "NONE"
    Info: Parameter "init_file" = "data_rom_initfile.hex"
    Info: Parameter "intended_device_family" = "Cyclone"
    Info: Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=1"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "numwords_a" = "32"
    Info: Parameter "operation_mode" = "ROM"
    Info: Parameter "outdata_aclr_a" = "NONE"
    Info: Parameter "outdata_reg_a" = "CLOCK0"
    Info: Parameter "widthad_a" = "5"
    Info: Parameter "width_a" = "8"
    Info: Parameter "width_byteena_a" = "1"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mp51.tdf
    Info: Found entity 1: altsyncram_mp51
Info: Elaborating entity "altsyncram_mp51" for hierarchy "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mg72.tdf
    Info: Found entity 1: altsyncram_mg72
Info: Elaborating entity "altsyncram_mg72" for hierarchy "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|altsyncram_mg72:altsyncram1"
Info: Elaborating entity "sld_mod_ram_rom" for hierarchy "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|sld_mod_ram_rom:mgl_prim2"
Info: Elaborated megafunction instantiation "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|sld_mod_ram_rom:mgl_prim2"
Info: Instantiated megafunction "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|sld_mod_ram_rom:mgl_prim2" with the following parameter:
    Info: Parameter "CVALUE" = "00000000"
    Info: Parameter "IS_DATA_IN_RAM" = "1"
    Info: Parameter "IS_READABLE" = "1"
    Info: Parameter "NODE_NAME" = "822083584"
    Info: Parameter "NUMWORDS" = "32"
    Info: Parameter "SHIFT_COUNT_BITS" = "4"
    Info: Parameter "WIDTH_WORD" = "8"
    Info: Parameter "WIDTHAD" = "5"
Info: Elaborating entity "sld_rom_sr" for hierarchy "data_rom:rom1|altsyncram:altsyncram_component|altsyncram_mp51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr"
Warning: Output pins are stuck at VCC or GND
    Warning (13410): Pin "lcd_rs" is stuck at GND
    Warning (13410): Pin "lcd_rw" is stuck at GND
    Warning (13410): Pin "lcd_data[0]" is stuck at GND
    Warning (13410): Pin "lcd_data[6]" is stuck at GND
Info: 2 registers lost all their fanouts during netlist optimizations. The first 2 are displayed below.
    Info: Register "current_state.wr_data1" lost all its fanouts during netlist optimizations.
    Info: Register "current_state.wr_data2" lost all its fanouts during netlist optimizations.
Info: Registers with preset signals will power-up high
Info: Implemented 229 device resources after synthesis - the final resource count might be different
    Info: Implemented 5 input pins
    Info: Implemented 12 output pins
    Info: Implemented 203 logic cells
    Info: Implemented 8 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings
    Info: Peak virtual memory: 186 megabytes
    Info: Processing ended: Fri Apr 24 10:29:32 2009
    Info: Elapsed time: 00:00:10
    Info: Total CPU time (on all processors): 00:00:09


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