jk_ff.map.summary

这是我自己写的一个关于JK触发器的VERILOG 程序。

Analysis & Synthesis Status : Successful - Mon Mar 30 21:41:39 2009
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Web Edition
Revision Name : jk_ff
Top-level Entity Name : jk_ff
Family : Cyclone II
Total logic elements : 2
    Total combinational functions : 2
    Dedicated logic registers : 0
Total registers : 0
Total pins : 6
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0